[Xen-devel] [PATCH v2 0/3] x86: improve assisted tlb flush and use it in guest mode

Roger Pau Monne posted 3 patches 36 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/xen tags/patchew/20200110160404.15573-1-roger.pau@citrix.com
xen/arch/x86/guest/hypervisor.c        |  9 +++++
xen/arch/x86/guest/xen/xen.c           |  6 +++
xen/arch/x86/hvm/asid.c                |  6 +--
xen/arch/x86/hvm/hvm.c                 | 54 +++++++++++---------------
xen/arch/x86/hvm/viridian/viridian.c   |  7 +---
xen/arch/x86/smp.c                     |  6 +++
xen/include/asm-x86/guest/hypervisor.h | 13 +++++++
xen/include/asm-x86/hvm/hvm.h          |  2 +-
8 files changed, 62 insertions(+), 41 deletions(-)

[Xen-devel] [PATCH v2 0/3] x86: improve assisted tlb flush and use it in guest mode

Posted by Roger Pau Monne 36 weeks ago
Hello,

The following series aims to improve the TLB flush times when running
nested Xen, and it's specially beneficial when running in shim mode.

Patch #2 is likely the most controversial one, as it changes the
implementation of assisted TLB flushes. I have to admit I haven't been
able to figure out why HVM guest context flushes issued a
flush_tlb_mask, and the commit introducing such behavior doesn't contain
a helpful commit message.

See patch #3 for a comparison on the performance of the L0 assisted
flush vs using x2APIC shorthand.

Thanks, Roger.

Roger Pau Monne (3):
  x86/hvm: allow ASID flush when v != current
  x86/hvm: rework HVMOP_flush_tlbs
  x86/tlb: use Xen L0 assisted TLB flush when available

 xen/arch/x86/guest/hypervisor.c        |  9 +++++
 xen/arch/x86/guest/xen/xen.c           |  6 +++
 xen/arch/x86/hvm/asid.c                |  6 +--
 xen/arch/x86/hvm/hvm.c                 | 54 +++++++++++---------------
 xen/arch/x86/hvm/viridian/viridian.c   |  7 +---
 xen/arch/x86/smp.c                     |  6 +++
 xen/include/asm-x86/guest/hypervisor.h | 13 +++++++
 xen/include/asm-x86/hvm/hvm.h          |  2 +-
 8 files changed, 62 insertions(+), 41 deletions(-)

-- 
2.24.1


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Re: [Xen-devel] [PATCH v2 0/3] x86: improve assisted tlb flush and use it in guest mode

Posted by Jan Beulich 36 weeks ago
On 10.01.2020 17:04, Roger Pau Monne wrote:
> Patch #2 is likely the most controversial one, as it changes the
> implementation of assisted TLB flushes. I have to admit I haven't been
> able to figure out why HVM guest context flushes issued a
> flush_tlb_mask, and the commit introducing such behavior doesn't contain
> a helpful commit message.

A shadow mode thing, maybe?

Jan

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Re: [Xen-devel] [PATCH v2 0/3] x86: improve assisted tlb flush and use it in guest mode

Posted by Roger Pau Monné 36 weeks ago
On Fri, Jan 10, 2020 at 05:08:16PM +0100, Jan Beulich wrote:
> On 10.01.2020 17:04, Roger Pau Monne wrote:
> > Patch #2 is likely the most controversial one, as it changes the
> > implementation of assisted TLB flushes. I have to admit I haven't been
> > able to figure out why HVM guest context flushes issued a
> > flush_tlb_mask, and the commit introducing such behavior doesn't contain
> > a helpful commit message.
> 
> A shadow mode thing, maybe?

Hm, I could be wrong, but that flush doesn't seem to make sense for
shadow mode either.

If VPID/ASID is used, ticking it will drop all the guest caches, and
if VPID/ASID not used a vmexit/vmentry will clear the cache.
According to my reading of the Intel SDM this applies regardless of
whether HAP (EPT) is used or not.

The flush done by flush_tlb_mask is in root mode, and hence doesn't
affect the guest (non-root) caches when SVM/VTx is used.

Roger.

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