Hello,

The current interrupt posting code doesn't flush the PIR into the IRR
when interrupts are modified, and as a result a vCPU can receive vectors
from a tear down or moved interrupt. Fix this by making sure PIR is
always synced to IRR when vMSI or vIO-APIC interrupts are modified.

Roger Pau Monne (3):
  vmx: add ASSERT to prevent syncing PIR to IRR...
  x86/passthrough: fix migration of MSI when using posted interrupts
  x86/vioapic: sync PIR to IRR when modifying entries

 xen/arch/x86/hvm/hvm.c           |  31 ++++++++
 xen/arch/x86/hvm/vioapic.c       |  46 ++++++++++--
 xen/arch/x86/hvm/vlapic.c        |  19 +++++
 xen/arch/x86/hvm/vmsi.c          |  23 ------
 xen/arch/x86/hvm/vmx/vmx.c       |  11 +++
 xen/drivers/passthrough/io.c     | 118 ++++++++++++++-----------------
 xen/include/asm-x86/hvm/hvm.h    |   5 +-
 xen/include/asm-x86/hvm/vlapic.h |   3 +
 8 files changed, 162 insertions(+), 94 deletions(-)

-- 
2.24.0


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