lmsw is an obsolete relic of the 286 processor - so much so that it even lacks
intercept assistance on AMD processors.

Use a plain mov to %cr0 which is easier to follow, certainly faster to
virtualise on AMD hardware, and almost certainly a faster microcode path in
real hardware.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Wei Liu <wl@xen.org>
CC: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/arch/x86/boot/trampoline.S | 12 ++++++------
 xen/arch/x86/boot/wakeup.S     |  5 +++--
 2 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/xen/arch/x86/boot/trampoline.S b/xen/arch/x86/boot/trampoline.S
index 1b11b4757a..89f841331d 100644
--- a/xen/arch/x86/boot/trampoline.S
+++ b/xen/arch/x86/boot/trampoline.S
@@ -54,9 +54,10 @@ GLOBAL(trampoline_realmode_entry)
         lidt    bootsym(idt_48)
         lgdt    bootsym(gdt_48)
         mov     $1,%bl                    # EBX != 0 indicates we are an AP
-        xor     %ax, %ax
-        inc     %ax
-        lmsw    %ax                       # CR0.PE = 1 (enter protected mode)
+
+        mov     $X86_CR0_PE, %eax
+        mov     %eax, %cr0
+
         ljmpl   $BOOT_CS32,$bootsym_rel(trampoline_protmode_entry,6)
 
         .code32
@@ -252,9 +253,8 @@ trampoline_boot_cpu_entry:
         lgdt    bootsym(gdt_48)
 
         /* Enter protected mode, and flush insn queue. */
-        xor     %ax,%ax
-        inc     %ax
-        lmsw    %ax                       # CR0.PE = 1 (enter protected mode)
+        mov     $X86_CR0_PE, %eax
+        mov     %eax, %cr0
 
         /* Load proper protected-mode values into all segment registers. */
         ljmpl   $BOOT_CS32,$bootsym_rel(1f,6)
diff --git a/xen/arch/x86/boot/wakeup.S b/xen/arch/x86/boot/wakeup.S
index e3cb9e033a..2af6c6017c 100644
--- a/xen/arch/x86/boot/wakeup.S
+++ b/xen/arch/x86/boot/wakeup.S
@@ -51,8 +51,9 @@ ENTRY(wakeup_start)
         lidt    wakesym(idt_48)
         lgdt    wakesym(gdt_48)
 
-        movw    $1, %ax
-        lmsw    %ax             # Turn on CR0.PE 
+        mov     $X86_CR0_PE, %eax
+        mov     %eax, %cr0
+
         ljmpl   $BOOT_CS32, $bootsym_rel(wakeup_32, 6)
 
 /* This code uses an extended set of video mode numbers. These include:
-- 
2.11.0


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On 19.08.2019 15:42, Andrew Cooper wrote:
> lmsw is an obsolete relic of the 286 processor - so much so that it even lacks
> intercept assistance on AMD processors.
> 
> Use a plain mov to %cr0 which is easier to follow, certainly faster to
> virtualise on AMD hardware, and almost certainly a faster microcode path in
> real hardware.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

Acked-by: Jan Beulich <jbeulich@suse.com>

with one further suggestion:

> --- a/xen/arch/x86/boot/trampoline.S
> +++ b/xen/arch/x86/boot/trampoline.S
> @@ -54,9 +54,10 @@ GLOBAL(trampoline_realmode_entry)
>          lidt    bootsym(idt_48)
>          lgdt    bootsym(gdt_48)
>          mov     $1,%bl                    # EBX != 0 indicates we are an AP
> -        xor     %ax, %ax
> -        inc     %ax
> -        lmsw    %ax                       # CR0.PE = 1 (enter protected mode)
> +
> +        mov     $X86_CR0_PE, %eax
> +        mov     %eax, %cr0

Why don't you use %ebx here, allowing the move to %bl to be
dropped at the same time?

Jan

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