[PATCH] ns16550: MMIO r/o ranges are maintained at page granularity

Jan Beulich posted 1 patch 2 years, 8 months ago
Failed in applying to current master (apply log)
[PATCH] ns16550: MMIO r/o ranges are maintained at page granularity
Posted by Jan Beulich 2 years, 8 months ago
Passing byte granular values will not have the intended effect. Address
the immediate issue, but I don't think what we do is actually
sufficient: At least some devices allow access to their registers via
either I/O ports or MMIO. In such aliasing cases we'd need to protect
the MMIO range even when we use I/O port accesses to drive the port.

Note that this way we may write-protect MMIO ranges of unrelated devices
as well. To deal with this, faults resulting from this would need
handling, to emulate the accesses outside of the protected range. (An
alternative would be to relocate the BAR, but I'm afraid this might end
up even more challenging.)

Fixes: c9f8e0aee507 ("ns16550: Add support for UART present in Broadcom TruManage capable NetXtreme chips")
Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/drivers/char/ns16550.c
+++ b/xen/drivers/char/ns16550.c
@@ -421,8 +421,8 @@ static void __init ns16550_init_postirq(
     if ( uart->bar || uart->ps_bdf_enable )
     {
         if ( uart->param && uart->param->mmio &&
-             rangeset_add_range(mmio_ro_ranges, uart->io_base,
-                                uart->io_base + uart->io_size - 1) )
+             rangeset_add_range(mmio_ro_ranges, PFN_DOWN(uart->io_base),
+                                PFN_UP(uart->io_base + uart->io_size) - 1) )
             printk(XENLOG_INFO "Error while adding MMIO range of device to mmio_ro_ranges\n");
 
         if ( pci_ro_device(0, uart->ps_bdf[0],


Re: [PATCH] ns16550: MMIO r/o ranges are maintained at page granularity
Posted by Julien Grall 2 years, 8 months ago
Hi Jan,

On 30/08/2021 14:05, Jan Beulich wrote:
> Passing byte granular values will not have the intended effect. Address
> the immediate issue, but I don't think what we do is actually
> sufficient: At least some devices allow access to their registers via
> either I/O ports or MMIO. In such aliasing cases we'd need to protect
> the MMIO range even when we use I/O port accesses to drive the port.
> 
> Note that this way we may write-protect MMIO ranges of unrelated devices
> as well. To deal with this, faults resulting from this would need
> handling, to emulate the accesses outside of the protected range. (An
> alternative would be to relocate the BAR, but I'm afraid this might end
> up even more challenging.)
> 
> Fixes: c9f8e0aee507 ("ns16550: Add support for UART present in Broadcom TruManage capable NetXtreme chips")
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Reviewed-by: Julien Grall <jgrall@amazon.com>

Cheers,

-- 
Julien Grall