Signed-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
---
tests/tcg/hexagon/hex_test.h | 15 +++
tests/tcg/hexagon/hvx_misc.h | 2 +
tests/tcg/hexagon/fp_hvx_cvt.c | 194 ++++++++++++++++++++++++++++++
tests/tcg/hexagon/Makefile.target | 3 +
4 files changed, 214 insertions(+)
create mode 100644 tests/tcg/hexagon/fp_hvx_cvt.c
diff --git a/tests/tcg/hexagon/hex_test.h b/tests/tcg/hexagon/hex_test.h
index cfed06a58b..28522faf04 100644
--- a/tests/tcg/hexagon/hex_test.h
+++ b/tests/tcg/hexagon/hex_test.h
@@ -109,6 +109,20 @@ static inline void __check64_ne(int line, uint64_t val, uint64_t expect)
"usr = r2\n\t"
/* Some useful floating point values */
+const uint16_t HF_INF = 0x7c00;
+const uint16_t HF_INF_neg = 0xfc00;
+const uint16_t HF_QNaN = 0x7e00;
+const uint16_t HF_SNaN = 0x7f80;
+const uint16_t HF_QNaN_neg = 0xfe00;
+const uint16_t HF_zero = 0x0000;
+const uint16_t HF_zero_neg = 0x8000;
+const uint16_t HF_one = 0x3c00;
+const uint16_t HF_one_recip = 0x3bf9;
+const uint16_t HF_two = 0x4000;
+const uint16_t HF_small_neg = 0x8010;
+const uint16_t HF_any = 0x3c00;
+const uint16_t HF_neg_two = 0xc000;
+
const uint32_t SF_INF = 0x7f800000;
const uint32_t SF_QNaN = 0x7fc00000;
const uint32_t SF_QNaN_special = 0x7f800001;
@@ -128,6 +142,7 @@ const uint32_t SF_large_pos = 0x5afa572e;
const uint32_t SF_any = 0x3f800000;
const uint32_t SF_denorm = 0x00000001;
const uint32_t SF_random = 0x346001d6;
+const uint32_t SF_neg_two = 0xc0000000;
const uint64_t DF_QNaN = 0x7ff8000000000000ULL;
const uint64_t DF_SNaN = 0x7ff7000000000000ULL;
diff --git a/tests/tcg/hexagon/hvx_misc.h b/tests/tcg/hexagon/hvx_misc.h
index 771a4a22b6..26dd9ad774 100644
--- a/tests/tcg/hexagon/hvx_misc.h
+++ b/tests/tcg/hexagon/hvx_misc.h
@@ -67,7 +67,9 @@ CHECK_OUTPUT_FUNC(d, 8)
CHECK_OUTPUT_FUNC(w, 4)
CHECK_OUTPUT_FUNC(sf, 4)
CHECK_OUTPUT_FUNC(h, 2)
+CHECK_OUTPUT_FUNC(uh, 2)
CHECK_OUTPUT_FUNC(hf, 2)
+CHECK_OUTPUT_FUNC(ub, 1)
CHECK_OUTPUT_FUNC(b, 1)
static inline void init_buffers(void)
diff --git a/tests/tcg/hexagon/fp_hvx_cvt.c b/tests/tcg/hexagon/fp_hvx_cvt.c
new file mode 100644
index 0000000000..7497455ac6
--- /dev/null
+++ b/tests/tcg/hexagon/fp_hvx_cvt.c
@@ -0,0 +1,194 @@
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include <stdio.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <string.h>
+#include <hexagon_types.h>
+#include <hvx_hexagon_protos.h>
+
+#if __HEXAGON_ARCH__ > 75
+#error "After v75, compiler will replace some FP HVX instructions."
+#endif
+
+int err;
+#include "hvx_misc.h"
+#include "hex_test.h"
+
+#define TEST_EXP(TO, FROM, VAL, EXP) do { \
+ ((MMVector *)&buffer)->FROM[index] = VAL; \
+ expect[0].TO[index] = EXP; \
+ index++; \
+} while (0)
+
+#define DEF_TEST_CVT(TO, FROM, TESTS) \
+ void test_vcvt_##TO##_##FROM(void) \
+ { \
+ HVX_Vector *hvx_output = (HVX_Vector *)&output[0]; \
+ HVX_Vector buffer; \
+ int index = 0; \
+ memset(&buffer, 0, sizeof(buffer)); \
+ memset(expect, 0, sizeof(expect)); \
+ TESTS \
+ *hvx_output = Q6_V##TO##_vcvt_V##FROM(buffer); \
+ check_output_##TO(__LINE__, 1); \
+ }
+
+DEF_TEST_CVT(uh, hf, { \
+ TEST_EXP(uh, hf, HF_QNaN, UINT16_MAX); \
+ TEST_EXP(uh, hf, HF_SNaN, UINT16_MAX); \
+ TEST_EXP(uh, hf, HF_QNaN_neg, UINT16_MAX); \
+ TEST_EXP(uh, hf, HF_INF, UINT16_MAX); \
+ TEST_EXP(uh, hf, HF_INF_neg, 0); \
+ TEST_EXP(uh, hf, HF_neg_two, 0); \
+ TEST_EXP(uh, hf, HF_zero_neg, 0); \
+ TEST_EXP(uh, hf, raw_hf((_Float16)2.1), 2); \
+ TEST_EXP(uh, hf, HF_one_recip, 1); \
+})
+
+DEF_TEST_CVT(h, hf, { \
+ TEST_EXP(h, hf, HF_QNaN, INT16_MAX); \
+ TEST_EXP(h, hf, HF_SNaN, INT16_MAX); \
+ TEST_EXP(h, hf, HF_QNaN_neg, INT16_MAX); \
+ TEST_EXP(h, hf, HF_INF, INT16_MAX); \
+ TEST_EXP(h, hf, HF_INF_neg, INT16_MIN); \
+ TEST_EXP(h, hf, HF_neg_two, -2); \
+ TEST_EXP(h, hf, HF_zero_neg, 0); \
+ TEST_EXP(h, hf, raw_hf((_Float16)2.1), 2); \
+ TEST_EXP(h, hf, HF_one_recip, 1); \
+})
+
+/*
+ * Some cvt operations take two vectors as input and perform the following:
+ * VdV.TO[4*i] = OP(VuV.FROM[2*i]);
+ * VdV.TO[4*i+1] = OP(VuV.FROM[2*i+1]);
+ * VdV.TO[4*i+2] = OP(VvV.FROM[2*i]);
+ * VdV.TO[4*i+3] = OP(VvV.FROM[2*i+1]))
+ * We use bf_index and index in a way that the tests are always done either
+ * using the first or third line of the above snippet.
+ */
+#define TEST_EXP_2(TO, FROM, VAL, EXP) do { \
+ ((MMVector *)&buffers[bf_index])->FROM[2 * index] = VAL; \
+ expect[0].TO[(4 * index) + (2 * bf_index)] = EXP; \
+ index++; \
+ bf_index = (bf_index + 1) % 2; \
+} while (0)
+
+#define DEF_TEST_CVT_2(TO, FROM, TESTS) \
+ void test_vcvt_##TO##_##FROM(void) \
+ { \
+ HVX_Vector *hvx_output = (HVX_Vector *)&output[0]; \
+ HVX_Vector buffers[2]; \
+ int index = 0, bf_index = 0; \
+ memset(&buffers, 0, sizeof(buffers)); \
+ memset(expect, 0, sizeof(expect)); \
+ TESTS \
+ *hvx_output = Q6_V##TO##_vcvt_V##FROM##V##FROM(buffers[0], buffers[1]); \
+ check_output_##TO(__LINE__, 1); \
+ }
+
+DEF_TEST_CVT_2(ub, hf, { \
+ TEST_EXP_2(ub, hf, HF_QNaN, UINT8_MAX); \
+ TEST_EXP_2(ub, hf, HF_SNaN, UINT8_MAX); \
+ TEST_EXP_2(ub, hf, HF_QNaN_neg, UINT8_MAX); \
+ TEST_EXP_2(ub, hf, HF_INF, UINT8_MAX); \
+ TEST_EXP_2(ub, hf, HF_INF_neg, 0); \
+ TEST_EXP_2(ub, hf, HF_small_neg, 0); \
+ TEST_EXP_2(ub, hf, HF_neg_two, 0); \
+ TEST_EXP_2(ub, hf, HF_zero_neg, 0); \
+ TEST_EXP_2(ub, hf, raw_hf((_Float16)2.1), 2); \
+ TEST_EXP_2(ub, hf, HF_one_recip, 1); \
+})
+
+DEF_TEST_CVT_2(b, hf, { \
+ TEST_EXP_2(b, hf, HF_QNaN, INT8_MAX); \
+ TEST_EXP_2(b, hf, HF_SNaN, INT8_MAX); \
+ TEST_EXP_2(b, hf, HF_QNaN_neg, INT8_MAX); \
+ TEST_EXP_2(b, hf, HF_INF, INT8_MAX); \
+ TEST_EXP_2(b, hf, HF_INF_neg, INT8_MIN); \
+ TEST_EXP_2(b, hf, HF_small_neg, 0); \
+ TEST_EXP_2(b, hf, HF_neg_two, -2); \
+ TEST_EXP_2(b, hf, HF_zero_neg, 0); \
+ TEST_EXP_2(b, hf, raw_hf((_Float16)2.1), 2); \
+ TEST_EXP_2(b, hf, HF_one_recip, 1); \
+})
+
+#define DEF_TEST_VCONV(TO, FROM, TESTS) \
+ void test_vconv_##TO##_##FROM(void) \
+ { \
+ HVX_Vector *hvx_output = (HVX_Vector *)&output[0]; \
+ HVX_Vector buffer; \
+ int index = 0; \
+ memset(&buffer, 0, sizeof(buffer)); \
+ memset(expect, 0, sizeof(expect)); \
+ TESTS \
+ *hvx_output = Q6_V##TO##_equals_V##FROM(buffer); \
+ check_output_##TO(__LINE__, 1); \
+ }
+
+DEF_TEST_VCONV(w, sf, { \
+ TEST_EXP(w, sf, SF_QNaN, INT32_MAX); \
+ TEST_EXP(w, sf, SF_SNaN, INT32_MAX); \
+ TEST_EXP(w, sf, SF_QNaN_neg, INT32_MIN); \
+ TEST_EXP(w, sf, SF_INF, INT32_MAX); \
+ TEST_EXP(w, sf, SF_INF_neg, INT32_MIN); \
+ TEST_EXP(w, sf, SF_small_neg, 0); \
+ TEST_EXP(w, sf, SF_neg_two, -2); \
+ TEST_EXP(w, sf, SF_zero_neg, 0); \
+ TEST_EXP(w, sf, raw_sf(2.1f), 2); \
+ TEST_EXP(w, sf, raw_sf(2.8f), 2); \
+})
+
+DEF_TEST_VCONV(h, hf, { \
+ TEST_EXP(h, hf, HF_QNaN, INT16_MAX); \
+ TEST_EXP(h, hf, HF_SNaN, INT16_MAX); \
+ TEST_EXP(h, hf, HF_QNaN_neg, INT16_MIN); \
+ TEST_EXP(h, hf, HF_INF, INT16_MAX); \
+ TEST_EXP(h, hf, HF_INF_neg, INT16_MIN); \
+ TEST_EXP(h, hf, HF_small_neg, 0); \
+ TEST_EXP(h, hf, HF_neg_two, -2); \
+ TEST_EXP(h, hf, HF_zero_neg, 0); \
+ TEST_EXP(h, hf, raw_hf(2.1), 2); \
+ TEST_EXP(h, hf, raw_hf(2.8), 2); \
+})
+
+DEF_TEST_VCONV(hf, h, { \
+ TEST_EXP(hf, h, INT16_MAX, HF_QNaN); \
+ TEST_EXP(hf, h, INT16_MAX, HF_SNaN); \
+ TEST_EXP(hf, h, INT16_MIN, HF_QNaN_neg); \
+ TEST_EXP(hf, h, INT16_MAX, HF_INF); \
+ TEST_EXP(hf, h, INT16_MIN, HF_INF_neg); \
+ TEST_EXP(hf, h, 0, HF_small_neg); \
+ TEST_EXP(hf, h, -2, HF_neg_two); \
+ TEST_EXP(hf, h, 0, HF_zero_neg); \
+ TEST_EXP(hf, h, 2, raw_hf(2.1)); \
+ TEST_EXP(hf, h, 2, raw_hf(2.8)); \
+})
+
+DEF_TEST_VCONV(sf, w, { \
+ TEST_EXP(sf, w, INT32_MAX, SF_QNaN); \
+ TEST_EXP(sf, w, INT32_MAX, SF_SNaN); \
+ TEST_EXP(sf, w, INT32_MIN, SF_QNaN_neg); \
+ TEST_EXP(sf, w, INT32_MAX, SF_INF); \
+ TEST_EXP(sf, w, INT32_MIN, SF_INF_neg); \
+ TEST_EXP(sf, w, 0, SF_small_neg); \
+ TEST_EXP(sf, w, -2, SF_neg_two); \
+ TEST_EXP(sf, w, 0, SF_zero_neg); \
+ TEST_EXP(sf, w, 2, raw_sf(2.1f)); \
+ TEST_EXP(sf, w, 2, raw_sf(2.8f)); \
+})
+
+int main(void)
+{
+ test_vcvt_uh_hf();
+ test_vcvt_h_hf();
+ test_vcvt_ub_hf();
+ test_vcvt_b_hf();
+ test_vconv_w_sf();
+ puts(err ? "FAIL" : "PASS");
+ return err ? 1 : 0;
+}
diff --git a/tests/tcg/hexagon/Makefile.target b/tests/tcg/hexagon/Makefile.target
index 16072c96fd..e240372fd2 100644
--- a/tests/tcg/hexagon/Makefile.target
+++ b/tests/tcg/hexagon/Makefile.target
@@ -51,6 +51,7 @@ HEX_TESTS += scatter_gather
HEX_TESTS += hvx_misc
HEX_TESTS += hvx_histogram
HEX_TESTS += fp_hvx
+HEX_TESTS += fp_hvx_cvt
HEX_TESTS += fp_hvx_disabled
HEX_TESTS += invalid-slots
HEX_TESTS += invalid-encoding
@@ -129,6 +130,8 @@ fp_hvx: fp_hvx.c hvx_misc.h
fp_hvx: CFLAGS += -mhvx -mhvx-ieee-fp
fp_hvx_disabled: fp_hvx_disabled.c hvx_misc.h
fp_hvx_disabled: CFLAGS += -mhvx -mhvx-ieee-fp
+fp_hvx_cvt: fp_hvx_cvt.c hvx_misc.h
+fp_hvx_cvt: CFLAGS += -mhvx -mhvx-ieee-fp
run-fp_hvx_disabled: QEMU_OPTS += -cpu v73,ieee-fp=false
--
2.37.2On Mon, Mar 23, 2026 at 7:16 AM Matheus Tavares Bernardino <
matheus.bernardino@oss.qualcomm.com> wrote:
> Signed-off-by: Matheus Tavares Bernardino <
> matheus.bernardino@oss.qualcomm.com>
> ---
> tests/tcg/hexagon/hex_test.h | 15 +++
> tests/tcg/hexagon/hvx_misc.h | 2 +
> tests/tcg/hexagon/fp_hvx_cvt.c | 194 ++++++++++++++++++++++++++++++
> tests/tcg/hexagon/Makefile.target | 3 +
> 4 files changed, 214 insertions(+)
> create mode 100644 tests/tcg/hexagon/fp_hvx_cvt.c
>
> diff --git a/tests/tcg/hexagon/fp_hvx_cvt.c
> b/tests/tcg/hexagon/fp_hvx_cvt.c
> new file mode 100644
> index 0000000000..7497455ac6
> --- /dev/null
> +++ b/tests/tcg/hexagon/fp_hvx_cvt.c
> @@ -0,0 +1,194 @@
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include <stdio.h>
> +#include <stdint.h>
> +#include <stdbool.h>
> +#include <string.h>
> +#include <hexagon_types.h>
> +#include <hvx_hexagon_protos.h>
> +
> +#if __HEXAGON_ARCH__ > 75
> +#error "After v75, compiler will replace some FP HVX instructions."
> +#endif
> +
> +int err;
> +#include "hvx_misc.h"
> +#include "hex_test.h"
> +
> +#define TEST_EXP(TO, FROM, VAL, EXP) do { \
> + ((MMVector *)&buffer)->FROM[index] = VAL; \
> + expect[0].TO[index] = EXP; \
> + index++; \
> +} while (0)
> +
> +#define DEF_TEST_CVT(TO, FROM, TESTS) \
> + void test_vcvt_##TO##_##FROM(void) \
>
static
> + { \
> + HVX_Vector *hvx_output = (HVX_Vector *)&output[0]; \
> + HVX_Vector buffer; \
> + int index = 0; \
> + memset(&buffer, 0, sizeof(buffer)); \
> + memset(expect, 0, sizeof(expect)); \
> + TESTS \
> + *hvx_output = Q6_V##TO##_vcvt_V##FROM(buffer); \
> + check_output_##TO(__LINE__, 1); \
> + }
> +
> +DEF_TEST_CVT(uh, hf, { \
> + TEST_EXP(uh, hf, HF_QNaN, UINT16_MAX); \
> + TEST_EXP(uh, hf, HF_SNaN, UINT16_MAX); \
> + TEST_EXP(uh, hf, HF_QNaN_neg, UINT16_MAX); \
> + TEST_EXP(uh, hf, HF_INF, UINT16_MAX); \
> + TEST_EXP(uh, hf, HF_INF_neg, 0); \
> + TEST_EXP(uh, hf, HF_neg_two, 0); \
> + TEST_EXP(uh, hf, HF_zero_neg, 0); \
> + TEST_EXP(uh, hf, raw_hf((_Float16)2.1), 2); \
> + TEST_EXP(uh, hf, HF_one_recip, 1); \
> +})
> +
> +DEF_TEST_CVT(h, hf, { \
> + TEST_EXP(h, hf, HF_QNaN, INT16_MAX); \
> + TEST_EXP(h, hf, HF_SNaN, INT16_MAX); \
> + TEST_EXP(h, hf, HF_QNaN_neg, INT16_MAX); \
> + TEST_EXP(h, hf, HF_INF, INT16_MAX); \
> + TEST_EXP(h, hf, HF_INF_neg, INT16_MIN); \
> + TEST_EXP(h, hf, HF_neg_two, -2); \
> + TEST_EXP(h, hf, HF_zero_neg, 0); \
> + TEST_EXP(h, hf, raw_hf((_Float16)2.1), 2); \
> + TEST_EXP(h, hf, HF_one_recip, 1); \
> +})
> +
> +/*
> + * Some cvt operations take two vectors as input and perform the
> following:
> + * VdV.TO[4*i] = OP(VuV.FROM[2*i]);
> + * VdV.TO[4*i+1] = OP(VuV.FROM[2*i+1]);
> + * VdV.TO[4*i+2] = OP(VvV.FROM[2*i]);
> + * VdV.TO[4*i+3] = OP(VvV.FROM[2*i+1]))
> + * We use bf_index and index in a way that the tests are always done
> either
> + * using the first or third line of the above snippet.
> + */
> +#define TEST_EXP_2(TO, FROM, VAL, EXP) do { \
> + ((MMVector *)&buffers[bf_index])->FROM[2 * index] = VAL; \
> + expect[0].TO[(4 * index) + (2 * bf_index)] = EXP; \
> + index++; \
> + bf_index = (bf_index + 1) % 2; \
> +} while (0)
> +
> +#define DEF_TEST_CVT_2(TO, FROM, TESTS) \
> + void test_vcvt_##TO##_##FROM(void) \
>
static
> + { \
> + HVX_Vector *hvx_output = (HVX_Vector *)&output[0]; \
> + HVX_Vector buffers[2]; \
> + int index = 0, bf_index = 0; \
> + memset(&buffers, 0, sizeof(buffers)); \
> + memset(expect, 0, sizeof(expect)); \
> + TESTS \
> + *hvx_output = Q6_V##TO##_vcvt_V##FROM##V##FROM(buffers[0],
> buffers[1]); \
> + check_output_##TO(__LINE__, 1); \
> + }
> +
> +DEF_TEST_CVT_2(ub, hf, { \
> + TEST_EXP_2(ub, hf, HF_QNaN, UINT8_MAX); \
> + TEST_EXP_2(ub, hf, HF_SNaN, UINT8_MAX); \
> + TEST_EXP_2(ub, hf, HF_QNaN_neg, UINT8_MAX); \
> + TEST_EXP_2(ub, hf, HF_INF, UINT8_MAX); \
> + TEST_EXP_2(ub, hf, HF_INF_neg, 0); \
> + TEST_EXP_2(ub, hf, HF_small_neg, 0); \
> + TEST_EXP_2(ub, hf, HF_neg_two, 0); \
> + TEST_EXP_2(ub, hf, HF_zero_neg, 0); \
> + TEST_EXP_2(ub, hf, raw_hf((_Float16)2.1), 2); \
> + TEST_EXP_2(ub, hf, HF_one_recip, 1); \
> +})
> +
> +DEF_TEST_CVT_2(b, hf, { \
> + TEST_EXP_2(b, hf, HF_QNaN, INT8_MAX); \
> + TEST_EXP_2(b, hf, HF_SNaN, INT8_MAX); \
> + TEST_EXP_2(b, hf, HF_QNaN_neg, INT8_MAX); \
> + TEST_EXP_2(b, hf, HF_INF, INT8_MAX); \
> + TEST_EXP_2(b, hf, HF_INF_neg, INT8_MIN); \
> + TEST_EXP_2(b, hf, HF_small_neg, 0); \
> + TEST_EXP_2(b, hf, HF_neg_two, -2); \
> + TEST_EXP_2(b, hf, HF_zero_neg, 0); \
> + TEST_EXP_2(b, hf, raw_hf((_Float16)2.1), 2); \
> + TEST_EXP_2(b, hf, HF_one_recip, 1); \
> +})
> +
> +#define DEF_TEST_VCONV(TO, FROM, TESTS) \
> + void test_vconv_##TO##_##FROM(void) \
>
static
> + { \
> + HVX_Vector *hvx_output = (HVX_Vector *)&output[0]; \
> + HVX_Vector buffer; \
> + int index = 0; \
> + memset(&buffer, 0, sizeof(buffer)); \
> + memset(expect, 0, sizeof(expect)); \
> + TESTS \
> + *hvx_output = Q6_V##TO##_equals_V##FROM(buffer); \
> + check_output_##TO(__LINE__, 1); \
> + }
> +
> +DEF_TEST_VCONV(w, sf, { \
> + TEST_EXP(w, sf, SF_QNaN, INT32_MAX); \
> + TEST_EXP(w, sf, SF_SNaN, INT32_MAX); \
> + TEST_EXP(w, sf, SF_QNaN_neg, INT32_MIN); \
> + TEST_EXP(w, sf, SF_INF, INT32_MAX); \
> + TEST_EXP(w, sf, SF_INF_neg, INT32_MIN); \
> + TEST_EXP(w, sf, SF_small_neg, 0); \
> + TEST_EXP(w, sf, SF_neg_two, -2); \
> + TEST_EXP(w, sf, SF_zero_neg, 0); \
> + TEST_EXP(w, sf, raw_sf(2.1f), 2); \
> + TEST_EXP(w, sf, raw_sf(2.8f), 2); \
> +})
> +
> +DEF_TEST_VCONV(h, hf, { \
> + TEST_EXP(h, hf, HF_QNaN, INT16_MAX); \
> + TEST_EXP(h, hf, HF_SNaN, INT16_MAX); \
> + TEST_EXP(h, hf, HF_QNaN_neg, INT16_MIN); \
> + TEST_EXP(h, hf, HF_INF, INT16_MAX); \
> + TEST_EXP(h, hf, HF_INF_neg, INT16_MIN); \
> + TEST_EXP(h, hf, HF_small_neg, 0); \
> + TEST_EXP(h, hf, HF_neg_two, -2); \
> + TEST_EXP(h, hf, HF_zero_neg, 0); \
> + TEST_EXP(h, hf, raw_hf(2.1), 2); \
> + TEST_EXP(h, hf, raw_hf(2.8), 2); \
> +})
> +
> +DEF_TEST_VCONV(hf, h, { \
> + TEST_EXP(hf, h, INT16_MAX, HF_QNaN); \
> + TEST_EXP(hf, h, INT16_MAX, HF_SNaN); \
> + TEST_EXP(hf, h, INT16_MIN, HF_QNaN_neg); \
> + TEST_EXP(hf, h, INT16_MAX, HF_INF); \
> + TEST_EXP(hf, h, INT16_MIN, HF_INF_neg); \
> + TEST_EXP(hf, h, 0, HF_small_neg); \
> + TEST_EXP(hf, h, -2, HF_neg_two); \
> + TEST_EXP(hf, h, 0, HF_zero_neg); \
> + TEST_EXP(hf, h, 2, raw_hf(2.1)); \
> + TEST_EXP(hf, h, 2, raw_hf(2.8)); \
> +})
> +
> +DEF_TEST_VCONV(sf, w, { \
> + TEST_EXP(sf, w, INT32_MAX, SF_QNaN); \
> + TEST_EXP(sf, w, INT32_MAX, SF_SNaN); \
> + TEST_EXP(sf, w, INT32_MIN, SF_QNaN_neg); \
> + TEST_EXP(sf, w, INT32_MAX, SF_INF); \
> + TEST_EXP(sf, w, INT32_MIN, SF_INF_neg); \
> + TEST_EXP(sf, w, 0, SF_small_neg); \
> + TEST_EXP(sf, w, -2, SF_neg_two); \
> + TEST_EXP(sf, w, 0, SF_zero_neg); \
> + TEST_EXP(sf, w, 2, raw_sf(2.1f)); \
> + TEST_EXP(sf, w, 2, raw_sf(2.8f)); \
> +})
> +
> +int main(void)
> +{
> + test_vcvt_uh_hf();
> + test_vcvt_h_hf();
> + test_vcvt_ub_hf();
> + test_vcvt_b_hf();
> + test_vconv_w_sf();
>
Several more of these were created above but not called here. Marking them
static will flag the errors.
> + puts(err ? "FAIL" : "PASS");
> + return err ? 1 : 0;
> +}
>
Also, add checks for FP flags.
Thanks,
Taylor
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