[PATCH v1 0/3] Fixed bugs in pl080

Tao Ding posted 3 patches 3 weeks, 5 days ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/cover.1773301927.git.dingtao0430@163.com
Maintainers: Peter Maydell <peter.maydell@linaro.org>
hw/dma/pl080.c | 45 ++++++++++++++++++++++++++++-----------------
1 file changed, 28 insertions(+), 17 deletions(-)
[PATCH v1 0/3] Fixed bugs in pl080
Posted by Tao Ding 3 weeks, 5 days ago
Hi all,
When I tested pl080 using the existing dmatest tool in Linux, 
I found that pl080 could not output the results correctly.
The main issues involved are inconsistent source and destination bit widths, 
misalignment of LLI, which can lead to incorrect data and even cause qemu crashes.

Tao Ding (3):
  An interrupt is generated after the DMA transfer complete.
  The swidth and dwidth of pl080 are not equal.
  The LLI of pl080 should be aligned with 4 bytes.

 hw/dma/pl080.c | 45 ++++++++++++++++++++++++++++-----------------
 1 file changed, 28 insertions(+), 17 deletions(-)


base-commit: 1fd5ff9d76d23ab23a68419cbc76d5ee33e8b455
-- 
2.43.0
Re: [PATCH v1 0/3] Fixed bugs in pl080
Posted by Peter Maydell 3 weeks, 4 days ago
On Thu, 12 Mar 2026 at 08:02, Tao Ding <dingtao0430@163.com> wrote:
>
> Hi all,
> When I tested pl080 using the existing dmatest tool in Linux,
> I found that pl080 could not output the results correctly.
> The main issues involved are inconsistent source and destination bit widths,
> misalignment of LLI, which can lead to incorrect data and even cause qemu crashes.
>
> Tao Ding (3):
>   An interrupt is generated after the DMA transfer complete.
>   The swidth and dwidth of pl080 are not equal.
>   The LLI of pl080 should be aligned with 4 bytes.

Hi; I've taken patches 1 and 3 into target-arm.next (with
some adjustments to the commit messages). I had some
review comments on patch 2.

thanks
-- PMM