If ebreak executes while the hart is already in Debug Mode,
restart the Debug Module ROM from its halt entry rather than
falling back to the normal breakpoint exception path.

This matches the ROM-based debug flow used by hardware debuggers
that place an ebreak in Program Buffer code.

Signed-off-by: Chao Liu <chao.liu.zevorn@gmail.com>
---
 target/riscv/op_helper.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c
index 7f2769f444..406fe2ecd0 100644
--- a/target/riscv/op_helper.c
+++ b/target/riscv/op_helper.c
@@ -495,6 +495,13 @@ void helper_sdext_ebreak(CPURISCVState *env, target_ulong pc)
     CPUState *cs = env_cpu(env);
     bool enter_debug = false;
 
+    /* ebreak in debug mode: re-enter DM ROM at halt address */
+    if (riscv_cpu_cfg(env)->ext_sdext &&
+        env->debug_mode && env->dm_rom_present) {
+        env->pc = env->dm_halt_addr;
+        cpu_loop_exit(cs);
+    }
+
     if (riscv_cpu_cfg(env)->ext_sdext && !env->debug_mode) {
         if (env->virt_enabled) {
             if (env->priv == PRV_S) {
-- 
2.53.0