[PATCH RFC v1 0/2] tests/qtest: Add Intel IOMMU bare-metal test using iommu-testdev

Fengyuan Yu posted 2 patches 3 days, 1 hour ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/cover.1770172615.git.15fengyuan@gmail.com
Maintainers: Fabiano Rosas <farosas@suse.de>, Laurent Vivier <lvivier@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>, Tao Tang <tangtao1634@phytium.com.cn>
MAINTAINERS                          |   1 +
tests/qtest/iommu-intel-test.c       | 137 +++++++
tests/qtest/libqos/meson.build       |   3 +
tests/qtest/libqos/qos-intel-iommu.c | 566 +++++++++++++++++++++++++++
tests/qtest/libqos/qos-intel-iommu.h | 299 ++++++++++++++
tests/qtest/meson.build              |   2 +
6 files changed, 1008 insertions(+)
create mode 100644 tests/qtest/iommu-intel-test.c
create mode 100644 tests/qtest/libqos/qos-intel-iommu.c
create mode 100644 tests/qtest/libqos/qos-intel-iommu.h
[PATCH RFC v1 0/2] tests/qtest: Add Intel IOMMU bare-metal test using iommu-testdev
Posted by Fengyuan Yu 3 days, 1 hour ago
Hi,

This patch series adds a bare-metal qtest for the Intel IOMMU (VT-d) using
the iommu-testdev framework. The test exercises address translation paths
without requiring a full guest OS boot.

Motivation
----------

The Intel IOMMU implementation in QEMU supports various translation modes
including pass-through and translated (4-level paging) modes. Currently,
comprehensive testing of these translation paths requires booting a full
guest OS with appropriate drivers, which is time-consuming and makes
regression testing difficult.

This new test fills that gap by using iommu-testdev to trigger DMA
transactions and validate the IOMMU's translation logic directly.

Test Coverage
-------------

The new test provides:
- Legacy pass-through mode (identity mapping)
- Legacy translated mode with 4-level page table walks
- Root Entry Table and Context Entry Table configuration
- Complete 48-bit address space translation
- End-to-end DMA verification with memory validation

Testing
-------

QTEST_QEMU_BINARY=./build/qemu-system-x86_64 \
  ./build/tests/qtest/iommu-intel-test --tap -k

Thanks,
Fengyuan

Fengyuan Yu (2):
  tests/qtest/libqos: Add Intel IOMMU helper library
  tests/qtest: Add Intel IOMMU bare-metal test

 MAINTAINERS                          |   1 +
 tests/qtest/iommu-intel-test.c       | 137 +++++++
 tests/qtest/libqos/meson.build       |   3 +
 tests/qtest/libqos/qos-intel-iommu.c | 566 +++++++++++++++++++++++++++
 tests/qtest/libqos/qos-intel-iommu.h | 299 ++++++++++++++
 tests/qtest/meson.build              |   2 +
 6 files changed, 1008 insertions(+)
 create mode 100644 tests/qtest/iommu-intel-test.c
 create mode 100644 tests/qtest/libqos/qos-intel-iommu.c
 create mode 100644 tests/qtest/libqos/qos-intel-iommu.h

-- 
2.39.5
Re: [PATCH RFC v1 0/2] tests/qtest: Add Intel IOMMU bare-metal test using iommu-testdev
Posted by Tao Tang 2 days, 15 hours ago
Hi Fengyuan,

On 2026/2/4 11:06, Fengyuan Yu wrote:
> Hi,
>
> This patch series adds a bare-metal qtest for the Intel IOMMU (VT-d) using
> the iommu-testdev framework. The test exercises address translation paths
> without requiring a full guest OS boot.
>
> Motivation
> ----------
>
> The Intel IOMMU implementation in QEMU supports various translation modes
> including pass-through and translated (4-level paging) modes. Currently,
> comprehensive testing of these translation paths requires booting a full
> guest OS with appropriate drivers, which is time-consuming and makes
> regression testing difficult.
>
> This new test fills that gap by using iommu-testdev to trigger DMA
> transactions and validate the IOMMU's translation logic directly.
>
> Test Coverage
> -------------
>
> The new test provides:
> - Legacy pass-through mode (identity mapping)
> - Legacy translated mode with 4-level page table walks
> - Root Entry Table and Context Entry Table configuration
> - Complete 48-bit address space translation
> - End-to-end DMA verification with memory validation
>
> Testing
> -------
>
> QTEST_QEMU_BINARY=./build/qemu-system-x86_64 \
>    ./build/tests/qtest/iommu-intel-test --tap -k
>
> Thanks,
> Fengyuan


Thanks for working on VT-d qtests. As a first-time patch contributor, 
you’ve already done a great job with good cover letter and commit 
messages to accurately summarize your work.


It seems that your code cannot be applied to the latest master branch. 
And I also noticed multiple lines >80 columns (some > 90). QEMU style 
says try to keep lines to 80 columns, only going a bit over when 
wrapping would harm readability but never > 90 columns.

../tests/qtest/libqos/qos-intel-iommu.c: In function 
‘qvtd_build_root_entry’:
../tests/qtest/libqos/qos-intel-iommu.c:168:31: error: 
‘VTD_CONTEXT_ENTRY_SLPTPTR’ undeclared (first use in this function); did 
you mean ‘VTD_CONTEXT_ENTRY_SSPTPTR’?
   168 |     lo = (context_table_ptr & VTD_CONTEXT_ENTRY_SLPTPTR) | 
VTD_CONTEXT_ENTRY_P;
       |                               ^~~~~~~~~~~~~~~~~~~~~~~~~
       |                               VTD_CONTEXT_ENTRY_SSPTPTR
../tests/qtest/libqos/qos-intel-iommu.c:168:31: note: each undeclared 
identifier is reported only once for each function it appears in
../tests/qtest/libqos/qos-intel-iommu.c: In function 
‘qvtd_build_context_entry’:
../tests/qtest/libqos/qos-intel-iommu.c:190:25: error: 
‘VTD_CONTEXT_ENTRY_SLPTPTR’ undeclared (first use in this function); did 
you mean ‘VTD_CONTEXT_ENTRY_SSPTPTR’?
   190 |              (slptptr & VTD_CONTEXT_ENTRY_SLPTPTR);
       |                         ^~~~~~~~~~~~~~~~~~~~~~~~~
       |                         VTD_CONTEXT_ENTRY_SSPTPTR
../tests/qtest/libqos/qos-intel-iommu.c: In function 
‘qvtd_setup_translation_tables’:
../tests/qtest/libqos/qos-intel-iommu.c:239:36: error: ‘VTD_SL_R’ 
undeclared (first use in this function); did you mean ‘VTD_SS_R’?
   239 |     pml4_entry = QVTD_PT_L3_BASE | VTD_SL_R | VTD_SL_W;
       |                                    ^~~~~~~~
       |                                    VTD_SS_R
../tests/qtest/libqos/qos-intel-iommu.c:239:47: error: ‘VTD_SL_W’ 
undeclared (first use in this function); did you mean ‘VTD_SS_W’?
   239 |     pml4_entry = QVTD_PT_L3_BASE | VTD_SL_R | VTD_SL_W;
       |                                               ^~~~~~~~
       |                                               VTD_SS_W
[92/2328] Compiling C object libblock.a.p/block.c.o



Besides when submitting patches it’s a good idea to read 
`docs/devel/submitting-a-patch.rst`. It may be a bit long, but making 
sure the code builds cleanly and running scripts/checkpatch.pl for style 
checks beforehand can help avoid many basic issues.


Finally I think CC the experts on x86 and VT-d emulation might be a more 
efficient way to review this sereis patch.

M: Paolo Bonzini <pbonzini@redhat.com>
R: Zhao Liu <zhao1.liu@intel.com>

M: Michael S. Tsirkin <mst@redhat.com>
R: Jason Wang <jasowang@redhat.com>
R: Yi Liu <yi.l.liu@intel.com>
R: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>


Anyway I'm looking forward to your v2 patches.

Best regards,

Tao


Re: [PATCH RFC v1 0/2] tests/qtest: Add Intel IOMMU bare-metal test using iommu-testdev
Posted by Fengyuan 1 day, 18 hours ago
Hi Tao,

Thanks for the attention!

On 2/4/2026 9:14 PM, Tao Tang wrote:
> Hi Fengyuan,
> 
> On 2026/2/4 11:06, Fengyuan Yu wrote:
>> Hi,
>>
>> This patch series adds a bare-metal qtest for the Intel IOMMU (VT-d) using
>> the iommu-testdev framework. The test exercises address translation paths
>> without requiring a full guest OS boot.
>>
>> Motivation
>> ----------
>>
>> The Intel IOMMU implementation in QEMU supports various translation modes
>> including pass-through and translated (4-level paging) modes. Currently,
>> comprehensive testing of these translation paths requires booting a full
>> guest OS with appropriate drivers, which is time-consuming and makes
>> regression testing difficult.
>>
>> This new test fills that gap by using iommu-testdev to trigger DMA
>> transactions and validate the IOMMU's translation logic directly.
>>
>> Test Coverage
>> -------------
>>
>> The new test provides:
>> - Legacy pass-through mode (identity mapping)
>> - Legacy translated mode with 4-level page table walks
>> - Root Entry Table and Context Entry Table configuration
>> - Complete 48-bit address space translation
>> - End-to-end DMA verification with memory validation
>>
>> Testing
>> -------
>>
>> QTEST_QEMU_BINARY=./build/qemu-system-x86_64 \
>>    ./build/tests/qtest/iommu-intel-test --tap -k
>>
>> Thanks,
>> Fengyuan
> 
> 
> Thanks for working on VT-d qtests. As a first-time patch contributor, you’ve 
> already done a great job with good cover letter and commit messages to 
> accurately summarize your work.
> 
> 
> It seems that your code cannot be applied to the latest master branch. And I 
> also noticed multiple lines >80 columns (some > 90). QEMU style says try to keep 
> lines to 80 columns, only going a bit over when wrapping would harm readability 
> but never > 90 columns.
> 
> ../tests/qtest/libqos/qos-intel-iommu.c: In function ‘qvtd_build_root_entry’:
> ../tests/qtest/libqos/qos-intel-iommu.c:168:31: error: 
> ‘VTD_CONTEXT_ENTRY_SLPTPTR’ undeclared (first use in this function); did you 
> mean ‘VTD_CONTEXT_ENTRY_SSPTPTR’?
>    168 |     lo = (context_table_ptr & VTD_CONTEXT_ENTRY_SLPTPTR) | 
> VTD_CONTEXT_ENTRY_P;
>        |                               ^~~~~~~~~~~~~~~~~~~~~~~~~
>        |                               VTD_CONTEXT_ENTRY_SSPTPTR
> ../tests/qtest/libqos/qos-intel-iommu.c:168:31: note: each undeclared identifier 
> is reported only once for each function it appears in
> ../tests/qtest/libqos/qos-intel-iommu.c: In function ‘qvtd_build_context_entry’:
> ../tests/qtest/libqos/qos-intel-iommu.c:190:25: error: 
> ‘VTD_CONTEXT_ENTRY_SLPTPTR’ undeclared (first use in this function); did you 
> mean ‘VTD_CONTEXT_ENTRY_SSPTPTR’?
>    190 |              (slptptr & VTD_CONTEXT_ENTRY_SLPTPTR);
>        |                         ^~~~~~~~~~~~~~~~~~~~~~~~~
>        |                         VTD_CONTEXT_ENTRY_SSPTPTR
> ../tests/qtest/libqos/qos-intel-iommu.c: In function 
> ‘qvtd_setup_translation_tables’:
> ../tests/qtest/libqos/qos-intel-iommu.c:239:36: error: ‘VTD_SL_R’ undeclared 
> (first use in this function); did you mean ‘VTD_SS_R’?
>    239 |     pml4_entry = QVTD_PT_L3_BASE | VTD_SL_R | VTD_SL_W;
>        |                                    ^~~~~~~~
>        |                                    VTD_SS_R
> ../tests/qtest/libqos/qos-intel-iommu.c:239:47: error: ‘VTD_SL_W’ undeclared 
> (first use in this function); did you mean ‘VTD_SS_W’?
>    239 |     pml4_entry = QVTD_PT_L3_BASE | VTD_SL_R | VTD_SL_W;
>        |                                               ^~~~~~~~
>        |                                               VTD_SS_W
> [92/2328] Compiling C object libblock.a.p/block.c.o
> 
> 
> 
> Besides when submitting patches it’s a good idea to read `docs/devel/submitting- 
> a-patch.rst`. It may be a bit long, but making sure the code builds cleanly and 
> running scripts/checkpatch.pl for style checks beforehand can help avoid many 
> basic issues.
> 
> 
Thank you for your reply, and I sincerely apologize for my oversight.
I have identified the issue: since I started development on iommu-testdev 
earlier, some Intel IOMMU macro definitions changed during my development, 
causing them to be undefined.
I will include comprehensive CI/CD checks and patch verification in v2.

> Finally I think CC the experts on x86 and VT-d emulation might be a more 
> efficient way to review this sereis patch.
> 
> M: Paolo Bonzini <pbonzini@redhat.com>
> R: Zhao Liu <zhao1.liu@intel.com>
> 
> M: Michael S. Tsirkin <mst@redhat.com>
> R: Jason Wang <jasowang@redhat.com>
> R: Yi Liu <yi.l.liu@intel.com>
> R: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
> 
> 
Okay, I will cc these reviewers in v2 submission.

Thanks,

Fengyuan

> Anyway I'm looking forward to your v2 patches.
> 
> Best regards,
> 
> Tao
>