[v2] fix the way riscv_plic_hart_config_string() gets the CPUState

[PATCH v2 0/1] fix the way riscv_plic_hart_config_string() gets the CPUState

Chao Liu posted 1 patch 9 months, 3 weeks ago

Diff against v3 v4 v5
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git fetch https://github.com/patchew-project/qemu tags/patchew/cover.1744776027.git.lc00631@tecorigin.com

Maintainers: Alistair Francis <Alistair.Francis@wdc.com>, Palmer Dabbelt <palmer@dabbelt.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>

There is a newer version of this series

hw/intc/sifive_plic.c      | 2 +-
hw/riscv/boot.c            | 4 ++--
hw/riscv/microchip_pfsoc.c | 2 +-
hw/riscv/sifive_u.c        | 5 +++--
hw/riscv/virt.c            | 2 +-
include/hw/riscv/boot.h    | 2 +-
6 files changed, 9 insertions(+), 8 deletions(-)

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[PATCH v2 0/1] fix the way riscv_plic_hart_config_string() gets the CPUState

Posted by Chao Liu 9 months, 3 weeks ago

Hi, all:

I made the following changes in version 2 of the patch:

Regarding the plic initialization phase to get CPUState by traversing
qemu_get_cpu(), this is an early design flaw, a better approach would be to use
riscv's hartid for indexing via the interface cpu_by_arch_id().

PATCH v1: 
https://lore.kernel.org/qemu-riscv/416e68f4-bf12-4218-ae2d-0246cc8ea8ec@linaro.org/T/#u

--
Regards,
Chao


Chao Liu (1):
  hw/riscv: fix PLIC hart topology configuration string when not getting
    CPUState correctly

 hw/intc/sifive_plic.c      | 2 +-
 hw/riscv/boot.c            | 4 ++--
 hw/riscv/microchip_pfsoc.c | 2 +-
 hw/riscv/sifive_u.c        | 5 +++--
 hw/riscv/virt.c            | 2 +-
 include/hw/riscv/boot.h    | 2 +-
 6 files changed, 9 insertions(+), 8 deletions(-)

-- 
2.48.1