These functions need AddressSpace from CPUState but take PowerPCCPU
instead and cast that. We have the right type in the caller so change
the parameter type and pass the needed value to avoid casting.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
target/ppc/mmu-hash32.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c
index 82a02881c2..0f9c61bf89 100644
--- a/target/ppc/mmu-hash32.c
+++ b/target/ppc/mmu-hash32.c
@@ -228,16 +228,18 @@ static hwaddr ppc_hash32_pteg_search(PowerPCCPU *cpu, hwaddr pte_addr,
return -1;
}
-static void ppc_hash32_set_r(PowerPCCPU *cpu, hwaddr pte_addr, uint32_t pte1)
+static void ppc_hash32_set_r(AddressSpace *cpu_as, hwaddr pte_addr,
+ uint32_t pte1)
{
/* The HW performs a non-atomic byte update */
- stb_phys(CPU(cpu)->as, pte_addr + 6, ((pte1 >> 8) & 0xff) | 0x01);
+ stb_phys(cpu_as, pte_addr + 6, ((pte1 >> 8) & 0xff) | 0x01);
}
-static void ppc_hash32_set_c(PowerPCCPU *cpu, hwaddr pte_addr, uint64_t pte1)
+static void ppc_hash32_set_c(AddressSpace *cpu_as, hwaddr pte_addr,
+ uint64_t pte1)
{
/* The HW performs a non-atomic byte update */
- stb_phys(CPU(cpu)->as, pte_addr + 7, (pte1 & 0xff) | 0x80);
+ stb_phys(cpu_as, pte_addr + 7, (pte1 & 0xff) | 0x80);
}
static hwaddr ppc_hash32_htab_lookup(PowerPCCPU *cpu,
@@ -399,11 +401,11 @@ bool ppc_hash32_xlate(CPUState *cs, vaddr eaddr, MMUAccessType access_type,
/* 8. Update PTE referenced and changed bits if necessary */
if (!(pte.pte1 & HPTE32_R_R)) {
- ppc_hash32_set_r(cpu, pte_addr, pte.pte1);
+ ppc_hash32_set_r(cs->as, pte_addr, pte.pte1);
}
if (!(pte.pte1 & HPTE32_R_C)) {
if (access_type == MMU_DATA_STORE) {
- ppc_hash32_set_c(cpu, pte_addr, pte.pte1);
+ ppc_hash32_set_c(cs->as, pte_addr, pte.pte1);
} else {
/*
* Treat the page as read-only for now, so that a later write
--
2.30.9