[PATCH v4 27/33] target/ppc/mmu_common.c: Simplify ppc_booke_xlate() part 2

BALATON Zoltan posted 33 patches 6 months, 2 weeks ago
Maintainers: BALATON Zoltan <balaton@eik.bme.hu>, Laurent Vivier <laurent@vivier.eu>, Nicholas Piggin <npiggin@gmail.com>, Daniel Henrique Barboza <danielhb413@gmail.com>
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[PATCH v4 27/33] target/ppc/mmu_common.c: Simplify ppc_booke_xlate() part 2
Posted by BALATON Zoltan 6 months, 2 weeks ago
Merge the code fetch and data access cases in a common switch.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
 target/ppc/mmu_common.c | 52 ++++++++++++++++-------------------------
 1 file changed, 20 insertions(+), 32 deletions(-)

diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index bb49721004..1d56dca8ba 100644
--- a/target/ppc/mmu_common.c
+++ b/target/ppc/mmu_common.c
@@ -1195,45 +1195,33 @@ static bool ppc_booke_xlate(PowerPCCPU *cpu, vaddr eaddr,
 
     log_cpu_state_mask(CPU_LOG_MMU, cs, 0);
     env->error_code = 0;
-    if (ret == -1) {
+    switch (ret) {
+    case -1:
+        /* No matches in page tables or TLB */
         if (env->mmu_model == POWERPC_MMU_BOOKE206) {
             booke206_update_mas_tlb_miss(env, eaddr, access_type, mmu_idx);
         }
-    }
-    if (access_type == MMU_INST_FETCH) {
-        switch (ret) {
-        case -1:
-            /* No matches in page tables or TLB */
-            cs->exception_index = POWERPC_EXCP_ITLB;
-            env->spr[SPR_BOOKE_DEAR] = eaddr;
-            env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type);
-            break;
-        case -2:
-            /* Access rights violation */
-            cs->exception_index = POWERPC_EXCP_ISI;
-            break;
-        case -3:
-            /* No execute protection violation */
-            cs->exception_index = POWERPC_EXCP_ISI;
-            env->spr[SPR_BOOKE_ESR] = 0;
-            break;
-        }
-    } else {
-        switch (ret) {
-        case -1:
-            /* No matches in page tables or TLB */
-            cs->exception_index = POWERPC_EXCP_DTLB;
-            env->spr[SPR_BOOKE_DEAR] = eaddr;
-            env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type);
-            break;
-        case -2:
-            /* Access rights violation */
-            cs->exception_index = POWERPC_EXCP_DSI;
+        cs->exception_index = (access_type == MMU_INST_FETCH) ?
+                              POWERPC_EXCP_ITLB : POWERPC_EXCP_DTLB;
+        env->spr[SPR_BOOKE_DEAR] = eaddr;
+        env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type);
+        break;
+    case -2:
+        /* Access rights violation */
+        cs->exception_index = (access_type == MMU_INST_FETCH) ?
+                              POWERPC_EXCP_ISI : POWERPC_EXCP_DSI;
+        if (access_type != MMU_INST_FETCH) {
             env->spr[SPR_BOOKE_DEAR] = eaddr;
             env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type);
-            break;
         }
+        break;
+    case -3:
+        /* No execute protection violation */
+        cs->exception_index = POWERPC_EXCP_ISI;
+        env->spr[SPR_BOOKE_ESR] = 0;
+        break;
     }
+
     return false;
 }
 
-- 
2.30.9
Re: [PATCH v4 27/33] target/ppc/mmu_common.c: Simplify ppc_booke_xlate() part 2
Posted by Nicholas Piggin 6 months, 2 weeks ago
On Thu May 9, 2024 at 9:36 AM AEST, BALATON Zoltan wrote:
> Merge the code fetch and data access cases in a common switch.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>

Reviewed-by: Nicholas Piggin <npiggin@gmail.com>

> ---
>  target/ppc/mmu_common.c | 52 ++++++++++++++++-------------------------
>  1 file changed, 20 insertions(+), 32 deletions(-)
>
> diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
> index bb49721004..1d56dca8ba 100644
> --- a/target/ppc/mmu_common.c
> +++ b/target/ppc/mmu_common.c
> @@ -1195,45 +1195,33 @@ static bool ppc_booke_xlate(PowerPCCPU *cpu, vaddr eaddr,
>  
>      log_cpu_state_mask(CPU_LOG_MMU, cs, 0);
>      env->error_code = 0;
> -    if (ret == -1) {
> +    switch (ret) {
> +    case -1:
> +        /* No matches in page tables or TLB */
>          if (env->mmu_model == POWERPC_MMU_BOOKE206) {
>              booke206_update_mas_tlb_miss(env, eaddr, access_type, mmu_idx);
>          }
> -    }
> -    if (access_type == MMU_INST_FETCH) {
> -        switch (ret) {
> -        case -1:
> -            /* No matches in page tables or TLB */
> -            cs->exception_index = POWERPC_EXCP_ITLB;
> -            env->spr[SPR_BOOKE_DEAR] = eaddr;
> -            env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type);
> -            break;
> -        case -2:
> -            /* Access rights violation */
> -            cs->exception_index = POWERPC_EXCP_ISI;
> -            break;
> -        case -3:
> -            /* No execute protection violation */
> -            cs->exception_index = POWERPC_EXCP_ISI;
> -            env->spr[SPR_BOOKE_ESR] = 0;
> -            break;
> -        }
> -    } else {
> -        switch (ret) {
> -        case -1:
> -            /* No matches in page tables or TLB */
> -            cs->exception_index = POWERPC_EXCP_DTLB;
> -            env->spr[SPR_BOOKE_DEAR] = eaddr;
> -            env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type);
> -            break;
> -        case -2:
> -            /* Access rights violation */
> -            cs->exception_index = POWERPC_EXCP_DSI;
> +        cs->exception_index = (access_type == MMU_INST_FETCH) ?
> +                              POWERPC_EXCP_ITLB : POWERPC_EXCP_DTLB;
> +        env->spr[SPR_BOOKE_DEAR] = eaddr;
> +        env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type);
> +        break;
> +    case -2:
> +        /* Access rights violation */
> +        cs->exception_index = (access_type == MMU_INST_FETCH) ?
> +                              POWERPC_EXCP_ISI : POWERPC_EXCP_DSI;
> +        if (access_type != MMU_INST_FETCH) {
>              env->spr[SPR_BOOKE_DEAR] = eaddr;
>              env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type);
> -            break;
>          }
> +        break;
> +    case -3:
> +        /* No execute protection violation */
> +        cs->exception_index = POWERPC_EXCP_ISI;
> +        env->spr[SPR_BOOKE_ESR] = 0;
> +        break;
>      }
> +
>      return false;
>  }
>