Add an abstract base class both the kernel driver
and user socket implementations can use to share code.
Signed-off-by: John G Johnson <john.g.johnson@oracle.com>
Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com>
Signed-off-by: Jagannathan Raman <jag.raman@oracle.com>
---
hw/vfio/pci.c | 106 +++++++++++++++++++++++++++++++++++-----------------------
hw/vfio/pci.h | 16 +++++++--
2 files changed, 78 insertions(+), 44 deletions(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 939dcc3..60acde5 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -235,7 +235,7 @@ static void vfio_intx_update(VFIOPCIDevice *vdev, PCIINTxRoute *route)
static void vfio_intx_routing_notifier(PCIDevice *pdev)
{
- VFIOPCIDevice *vdev = VFIO_PCI(pdev);
+ VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
PCIINTxRoute route;
if (vdev->interrupt != VFIO_INT_INTx) {
@@ -467,7 +467,7 @@ static void vfio_update_kvm_msi_virq(VFIOMSIVector *vector, MSIMessage msg,
static int vfio_msix_vector_do_use(PCIDevice *pdev, unsigned int nr,
MSIMessage *msg, IOHandler *handler)
{
- VFIOPCIDevice *vdev = VFIO_PCI(pdev);
+ VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
VFIOMSIVector *vector;
int ret;
@@ -561,7 +561,7 @@ static int vfio_msix_vector_use(PCIDevice *pdev,
static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr)
{
- VFIOPCIDevice *vdev = VFIO_PCI(pdev);
+ VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
VFIOMSIVector *vector = &vdev->msi_vectors[nr];
trace_vfio_msix_vector_release(vdev->vbasedev.name, nr);
@@ -1109,7 +1109,7 @@ static const MemoryRegionOps vfio_vga_ops = {
*/
static void vfio_sub_page_bar_update_mapping(PCIDevice *pdev, int bar)
{
- VFIOPCIDevice *vdev = VFIO_PCI(pdev);
+ VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
VFIORegion *region = &vdev->bars[bar].region;
MemoryRegion *mmap_mr, *region_mr, *base_mr;
PCIIORegion *r;
@@ -1155,7 +1155,7 @@ static void vfio_sub_page_bar_update_mapping(PCIDevice *pdev, int bar)
*/
uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len)
{
- VFIOPCIDevice *vdev = VFIO_PCI(pdev);
+ VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
uint32_t emu_bits = 0, emu_val = 0, phys_val = 0, val;
memcpy(&emu_bits, vdev->emulated_config_bits + addr, len);
@@ -1188,7 +1188,7 @@ uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len)
void vfio_pci_write_config(PCIDevice *pdev,
uint32_t addr, uint32_t val, int len)
{
- VFIOPCIDevice *vdev = VFIO_PCI(pdev);
+ VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
uint32_t val_le = cpu_to_le32(val);
trace_vfio_pci_write_config(vdev->vbasedev.name, addr, val, len);
@@ -2845,7 +2845,7 @@ static void vfio_unregister_req_notifier(VFIOPCIDevice *vdev)
static void vfio_realize(PCIDevice *pdev, Error **errp)
{
- VFIOPCIDevice *vdev = VFIO_PCI(pdev);
+ VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
VFIODevice *vbasedev = &vdev->vbasedev;
VFIODevice *vbasedev_iter;
VFIOGroup *group;
@@ -3169,7 +3169,7 @@ error:
static void vfio_instance_finalize(Object *obj)
{
- VFIOPCIDevice *vdev = VFIO_PCI(obj);
+ VFIOPCIDevice *vdev = VFIO_PCI_BASE(obj);
VFIOGroup *group = vdev->vbasedev.group;
vfio_display_finalize(vdev);
@@ -3189,7 +3189,7 @@ static void vfio_instance_finalize(Object *obj)
static void vfio_exitfn(PCIDevice *pdev)
{
- VFIOPCIDevice *vdev = VFIO_PCI(pdev);
+ VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
vfio_unregister_req_notifier(vdev);
vfio_unregister_err_notifier(vdev);
@@ -3208,7 +3208,7 @@ static void vfio_exitfn(PCIDevice *pdev)
static void vfio_pci_reset(DeviceState *dev)
{
- VFIOPCIDevice *vdev = VFIO_PCI(dev);
+ VFIOPCIDevice *vdev = VFIO_PCI_BASE(dev);
trace_vfio_pci_reset(vdev->vbasedev.name);
@@ -3248,7 +3248,7 @@ post_reset:
static void vfio_instance_init(Object *obj)
{
PCIDevice *pci_dev = PCI_DEVICE(obj);
- VFIOPCIDevice *vdev = VFIO_PCI(obj);
+ VFIOPCIDevice *vdev = VFIO_PCI_BASE(obj);
device_add_bootindex_property(obj, &vdev->bootindex,
"bootindex", NULL,
@@ -3265,24 +3265,12 @@ static void vfio_instance_init(Object *obj)
pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
}
-static Property vfio_pci_dev_properties[] = {
- DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice, host),
- DEFINE_PROP_STRING("sysfsdev", VFIOPCIDevice, vbasedev.sysfsdev),
+static Property vfio_pci_base_dev_properties[] = {
DEFINE_PROP_ON_OFF_AUTO("x-pre-copy-dirty-page-tracking", VFIOPCIDevice,
vbasedev.pre_copy_dirty_page_tracking,
ON_OFF_AUTO_ON),
- DEFINE_PROP_ON_OFF_AUTO("display", VFIOPCIDevice,
- display, ON_OFF_AUTO_OFF),
- DEFINE_PROP_UINT32("xres", VFIOPCIDevice, display_xres, 0),
- DEFINE_PROP_UINT32("yres", VFIOPCIDevice, display_yres, 0),
DEFINE_PROP_UINT32("x-intx-mmap-timeout-ms", VFIOPCIDevice,
intx.mmap_timeout, 1100),
- DEFINE_PROP_BIT("x-vga", VFIOPCIDevice, features,
- VFIO_FEATURE_ENABLE_VGA_BIT, false),
- DEFINE_PROP_BIT("x-req", VFIOPCIDevice, features,
- VFIO_FEATURE_ENABLE_REQ_BIT, true),
- DEFINE_PROP_BIT("x-igd-opregion", VFIOPCIDevice, features,
- VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT, false),
DEFINE_PROP_BOOL("x-enable-migration", VFIOPCIDevice,
vbasedev.enable_migration, false),
DEFINE_PROP_BOOL("x-no-mmap", VFIOPCIDevice, vbasedev.no_mmap, false),
@@ -3291,8 +3279,6 @@ static Property vfio_pci_dev_properties[] = {
DEFINE_PROP_BOOL("x-no-kvm-intx", VFIOPCIDevice, no_kvm_intx, false),
DEFINE_PROP_BOOL("x-no-kvm-msi", VFIOPCIDevice, no_kvm_msi, false),
DEFINE_PROP_BOOL("x-no-kvm-msix", VFIOPCIDevice, no_kvm_msix, false),
- DEFINE_PROP_BOOL("x-no-geforce-quirks", VFIOPCIDevice,
- no_geforce_quirks, false),
DEFINE_PROP_BOOL("x-no-kvm-ioeventfd", VFIOPCIDevice, no_kvm_ioeventfd,
false),
DEFINE_PROP_BOOL("x-no-vfio-ioeventfd", VFIOPCIDevice, no_vfio_ioeventfd,
@@ -3303,10 +3289,6 @@ static Property vfio_pci_dev_properties[] = {
sub_vendor_id, PCI_ANY_ID),
DEFINE_PROP_UINT32("x-pci-sub-device-id", VFIOPCIDevice,
sub_device_id, PCI_ANY_ID),
- DEFINE_PROP_UINT32("x-igd-gms", VFIOPCIDevice, igd_gms, 0),
- DEFINE_PROP_UNSIGNED_NODEFAULT("x-nv-gpudirect-clique", VFIOPCIDevice,
- nv_gpudirect_clique,
- qdev_prop_nv_gpudirect_clique, uint8_t),
DEFINE_PROP_OFF_AUTO_PCIBAR("x-msix-relocation", VFIOPCIDevice, msix_relo,
OFF_AUTOPCIBAR_OFF),
/*
@@ -3317,28 +3299,25 @@ static Property vfio_pci_dev_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
-static void vfio_pci_dev_class_init(ObjectClass *klass, void *data)
+static void vfio_pci_base_dev_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass);
- dc->reset = vfio_pci_reset;
- device_class_set_props(dc, vfio_pci_dev_properties);
- dc->desc = "VFIO-based PCI device assignment";
+ device_class_set_props(dc, vfio_pci_base_dev_properties);
+ dc->desc = "VFIO PCI base device";
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
- pdc->realize = vfio_realize;
pdc->exit = vfio_exitfn;
pdc->config_read = vfio_pci_read_config;
pdc->config_write = vfio_pci_write_config;
}
-static const TypeInfo vfio_pci_dev_info = {
- .name = TYPE_VFIO_PCI,
+static const TypeInfo vfio_pci_base_dev_info = {
+ .name = TYPE_VFIO_PCI_BASE,
.parent = TYPE_PCI_DEVICE,
- .instance_size = sizeof(VFIOPCIDevice),
- .class_init = vfio_pci_dev_class_init,
- .instance_init = vfio_instance_init,
- .instance_finalize = vfio_instance_finalize,
+ .instance_size = 0,
+ .abstract = true,
+ .class_init = vfio_pci_base_dev_class_init,
.interfaces = (InterfaceInfo[]) {
{ INTERFACE_PCIE_DEVICE },
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
@@ -3346,6 +3325,48 @@ static const TypeInfo vfio_pci_dev_info = {
},
};
+static Property vfio_pci_dev_properties[] = {
+ DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice, host),
+ DEFINE_PROP_STRING("sysfsdev", VFIOPCIDevice, vbasedev.sysfsdev),
+ DEFINE_PROP_ON_OFF_AUTO("display", VFIOPCIDevice,
+ display, ON_OFF_AUTO_OFF),
+ DEFINE_PROP_UINT32("xres", VFIOPCIDevice, display_xres, 0),
+ DEFINE_PROP_UINT32("yres", VFIOPCIDevice, display_yres, 0),
+ DEFINE_PROP_BIT("x-vga", VFIOPCIDevice, features,
+ VFIO_FEATURE_ENABLE_VGA_BIT, false),
+ DEFINE_PROP_BIT("x-req", VFIOPCIDevice, features,
+ VFIO_FEATURE_ENABLE_REQ_BIT, true),
+ DEFINE_PROP_BIT("x-igd-opregion", VFIOPCIDevice, features,
+ VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT, false),
+ DEFINE_PROP_BOOL("x-no-geforce-quirks", VFIOPCIDevice,
+ no_geforce_quirks, false),
+ DEFINE_PROP_UINT32("x-igd-gms", VFIOPCIDevice, igd_gms, 0),
+ DEFINE_PROP_UNSIGNED_NODEFAULT("x-nv-gpudirect-clique", VFIOPCIDevice,
+ nv_gpudirect_clique,
+ qdev_prop_nv_gpudirect_clique, uint8_t),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void vfio_pci_dev_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass);
+
+ dc->reset = vfio_pci_reset;
+ device_class_set_props(dc, vfio_pci_dev_properties);
+ dc->desc = "VFIO-based PCI device assignment";
+ pdc->realize = vfio_realize;
+}
+
+static const TypeInfo vfio_pci_dev_info = {
+ .name = TYPE_VFIO_PCI,
+ .parent = TYPE_VFIO_PCI_BASE,
+ .instance_size = sizeof(VFIOKernPCIDevice),
+ .class_init = vfio_pci_dev_class_init,
+ .instance_init = vfio_instance_init,
+ .instance_finalize = vfio_instance_finalize,
+};
+
static Property vfio_pci_dev_nohotplug_properties[] = {
DEFINE_PROP_BOOL("ramfb", VFIOPCIDevice, enable_ramfb, false),
DEFINE_PROP_END_OF_LIST(),
@@ -3362,12 +3383,13 @@ static void vfio_pci_nohotplug_dev_class_init(ObjectClass *klass, void *data)
static const TypeInfo vfio_pci_nohotplug_dev_info = {
.name = TYPE_VFIO_PCI_NOHOTPLUG,
.parent = TYPE_VFIO_PCI,
- .instance_size = sizeof(VFIOPCIDevice),
+ .instance_size = sizeof(VFIOKernPCIDevice),
.class_init = vfio_pci_nohotplug_dev_class_init,
};
static void register_vfio_pci_dev_type(void)
{
+ type_register_static(&vfio_pci_base_dev_info);
type_register_static(&vfio_pci_dev_info);
type_register_static(&vfio_pci_nohotplug_dev_info);
}
diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h
index 7c236a5..7c5c8ec 100644
--- a/hw/vfio/pci.h
+++ b/hw/vfio/pci.h
@@ -115,8 +115,13 @@ typedef struct VFIOMSIXInfo {
unsigned long *pending;
} VFIOMSIXInfo;
-#define TYPE_VFIO_PCI "vfio-pci"
-OBJECT_DECLARE_SIMPLE_TYPE(VFIOPCIDevice, VFIO_PCI)
+/*
+ * TYPE_VFIO_PCI_BASE is an abstract type used to share code
+ * between VFIO implementations that use a kernel driver
+ * with those that use user sockets.
+ */
+#define TYPE_VFIO_PCI_BASE "vfio-pci-base"
+OBJECT_DECLARE_SIMPLE_TYPE(VFIOPCIDevice, VFIO_PCI_BASE)
struct VFIOPCIDevice {
PCIDevice pdev;
@@ -177,6 +182,13 @@ struct VFIOPCIDevice {
Notifier irqchip_change_notifier;
};
+#define TYPE_VFIO_PCI "vfio-pci"
+OBJECT_DECLARE_SIMPLE_TYPE(VFIOKernPCIDevice, VFIO_PCI)
+
+struct VFIOKernPCIDevice {
+ VFIOPCIDevice device;
+};
+
/* Use uin32_t for vendor & device so PCI_ANY_ID expands and cannot match hw */
static inline bool vfio_pci_is(VFIOPCIDevice *vdev, uint32_t vendor, uint32_t device)
{
--
1.8.3.1Hello John,
On 11/9/22 00:13, John Johnson wrote:
> Add an abstract base class both the kernel driver
> and user socket implementations can use to share code.
>
> Signed-off-by: John G Johnson <john.g.johnson@oracle.com>
> Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com>
> Signed-off-by: Jagannathan Raman <jag.raman@oracle.com>
I would help the reader if the header files came first. You could use :
[diff]
orderFile = /path/to/qemu/scripts/git.orderfile
I would simply use 'Kernel' instead of 'Kern' in the type definition.
A part from that,
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Thanks,
C.
> ---
> hw/vfio/pci.c | 106 +++++++++++++++++++++++++++++++++++-----------------------
> hw/vfio/pci.h | 16 +++++++--
> 2 files changed, 78 insertions(+), 44 deletions(-)
>
> diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
> index 939dcc3..60acde5 100644
> --- a/hw/vfio/pci.c
> +++ b/hw/vfio/pci.c
> @@ -235,7 +235,7 @@ static void vfio_intx_update(VFIOPCIDevice *vdev, PCIINTxRoute *route)
>
> static void vfio_intx_routing_notifier(PCIDevice *pdev)
> {
> - VFIOPCIDevice *vdev = VFIO_PCI(pdev);
> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
> PCIINTxRoute route;
>
> if (vdev->interrupt != VFIO_INT_INTx) {
> @@ -467,7 +467,7 @@ static void vfio_update_kvm_msi_virq(VFIOMSIVector *vector, MSIMessage msg,
> static int vfio_msix_vector_do_use(PCIDevice *pdev, unsigned int nr,
> MSIMessage *msg, IOHandler *handler)
> {
> - VFIOPCIDevice *vdev = VFIO_PCI(pdev);
> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
> VFIOMSIVector *vector;
> int ret;
>
> @@ -561,7 +561,7 @@ static int vfio_msix_vector_use(PCIDevice *pdev,
>
> static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr)
> {
> - VFIOPCIDevice *vdev = VFIO_PCI(pdev);
> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
> VFIOMSIVector *vector = &vdev->msi_vectors[nr];
>
> trace_vfio_msix_vector_release(vdev->vbasedev.name, nr);
> @@ -1109,7 +1109,7 @@ static const MemoryRegionOps vfio_vga_ops = {
> */
> static void vfio_sub_page_bar_update_mapping(PCIDevice *pdev, int bar)
> {
> - VFIOPCIDevice *vdev = VFIO_PCI(pdev);
> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
> VFIORegion *region = &vdev->bars[bar].region;
> MemoryRegion *mmap_mr, *region_mr, *base_mr;
> PCIIORegion *r;
> @@ -1155,7 +1155,7 @@ static void vfio_sub_page_bar_update_mapping(PCIDevice *pdev, int bar)
> */
> uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len)
> {
> - VFIOPCIDevice *vdev = VFIO_PCI(pdev);
> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
> uint32_t emu_bits = 0, emu_val = 0, phys_val = 0, val;
>
> memcpy(&emu_bits, vdev->emulated_config_bits + addr, len);
> @@ -1188,7 +1188,7 @@ uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len)
> void vfio_pci_write_config(PCIDevice *pdev,
> uint32_t addr, uint32_t val, int len)
> {
> - VFIOPCIDevice *vdev = VFIO_PCI(pdev);
> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
> uint32_t val_le = cpu_to_le32(val);
>
> trace_vfio_pci_write_config(vdev->vbasedev.name, addr, val, len);
> @@ -2845,7 +2845,7 @@ static void vfio_unregister_req_notifier(VFIOPCIDevice *vdev)
>
> static void vfio_realize(PCIDevice *pdev, Error **errp)
> {
> - VFIOPCIDevice *vdev = VFIO_PCI(pdev);
> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
> VFIODevice *vbasedev = &vdev->vbasedev;
> VFIODevice *vbasedev_iter;
> VFIOGroup *group;
> @@ -3169,7 +3169,7 @@ error:
>
> static void vfio_instance_finalize(Object *obj)
> {
> - VFIOPCIDevice *vdev = VFIO_PCI(obj);
> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(obj);
> VFIOGroup *group = vdev->vbasedev.group;
>
> vfio_display_finalize(vdev);
> @@ -3189,7 +3189,7 @@ static void vfio_instance_finalize(Object *obj)
>
> static void vfio_exitfn(PCIDevice *pdev)
> {
> - VFIOPCIDevice *vdev = VFIO_PCI(pdev);
> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
>
> vfio_unregister_req_notifier(vdev);
> vfio_unregister_err_notifier(vdev);
> @@ -3208,7 +3208,7 @@ static void vfio_exitfn(PCIDevice *pdev)
>
> static void vfio_pci_reset(DeviceState *dev)
> {
> - VFIOPCIDevice *vdev = VFIO_PCI(dev);
> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(dev);
>
> trace_vfio_pci_reset(vdev->vbasedev.name);
>
> @@ -3248,7 +3248,7 @@ post_reset:
> static void vfio_instance_init(Object *obj)
> {
> PCIDevice *pci_dev = PCI_DEVICE(obj);
> - VFIOPCIDevice *vdev = VFIO_PCI(obj);
> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(obj);
>
> device_add_bootindex_property(obj, &vdev->bootindex,
> "bootindex", NULL,
> @@ -3265,24 +3265,12 @@ static void vfio_instance_init(Object *obj)
> pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
> }
>
> -static Property vfio_pci_dev_properties[] = {
> - DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice, host),
> - DEFINE_PROP_STRING("sysfsdev", VFIOPCIDevice, vbasedev.sysfsdev),
> +static Property vfio_pci_base_dev_properties[] = {
> DEFINE_PROP_ON_OFF_AUTO("x-pre-copy-dirty-page-tracking", VFIOPCIDevice,
> vbasedev.pre_copy_dirty_page_tracking,
> ON_OFF_AUTO_ON),
> - DEFINE_PROP_ON_OFF_AUTO("display", VFIOPCIDevice,
> - display, ON_OFF_AUTO_OFF),
> - DEFINE_PROP_UINT32("xres", VFIOPCIDevice, display_xres, 0),
> - DEFINE_PROP_UINT32("yres", VFIOPCIDevice, display_yres, 0),
> DEFINE_PROP_UINT32("x-intx-mmap-timeout-ms", VFIOPCIDevice,
> intx.mmap_timeout, 1100),
> - DEFINE_PROP_BIT("x-vga", VFIOPCIDevice, features,
> - VFIO_FEATURE_ENABLE_VGA_BIT, false),
> - DEFINE_PROP_BIT("x-req", VFIOPCIDevice, features,
> - VFIO_FEATURE_ENABLE_REQ_BIT, true),
> - DEFINE_PROP_BIT("x-igd-opregion", VFIOPCIDevice, features,
> - VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT, false),
> DEFINE_PROP_BOOL("x-enable-migration", VFIOPCIDevice,
> vbasedev.enable_migration, false),
> DEFINE_PROP_BOOL("x-no-mmap", VFIOPCIDevice, vbasedev.no_mmap, false),
> @@ -3291,8 +3279,6 @@ static Property vfio_pci_dev_properties[] = {
> DEFINE_PROP_BOOL("x-no-kvm-intx", VFIOPCIDevice, no_kvm_intx, false),
> DEFINE_PROP_BOOL("x-no-kvm-msi", VFIOPCIDevice, no_kvm_msi, false),
> DEFINE_PROP_BOOL("x-no-kvm-msix", VFIOPCIDevice, no_kvm_msix, false),
> - DEFINE_PROP_BOOL("x-no-geforce-quirks", VFIOPCIDevice,
> - no_geforce_quirks, false),
> DEFINE_PROP_BOOL("x-no-kvm-ioeventfd", VFIOPCIDevice, no_kvm_ioeventfd,
> false),
> DEFINE_PROP_BOOL("x-no-vfio-ioeventfd", VFIOPCIDevice, no_vfio_ioeventfd,
> @@ -3303,10 +3289,6 @@ static Property vfio_pci_dev_properties[] = {
> sub_vendor_id, PCI_ANY_ID),
> DEFINE_PROP_UINT32("x-pci-sub-device-id", VFIOPCIDevice,
> sub_device_id, PCI_ANY_ID),
> - DEFINE_PROP_UINT32("x-igd-gms", VFIOPCIDevice, igd_gms, 0),
> - DEFINE_PROP_UNSIGNED_NODEFAULT("x-nv-gpudirect-clique", VFIOPCIDevice,
> - nv_gpudirect_clique,
> - qdev_prop_nv_gpudirect_clique, uint8_t),
> DEFINE_PROP_OFF_AUTO_PCIBAR("x-msix-relocation", VFIOPCIDevice, msix_relo,
> OFF_AUTOPCIBAR_OFF),
> /*
> @@ -3317,28 +3299,25 @@ static Property vfio_pci_dev_properties[] = {
> DEFINE_PROP_END_OF_LIST(),
> };
>
> -static void vfio_pci_dev_class_init(ObjectClass *klass, void *data)
> +static void vfio_pci_base_dev_class_init(ObjectClass *klass, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(klass);
> PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass);
>
> - dc->reset = vfio_pci_reset;
> - device_class_set_props(dc, vfio_pci_dev_properties);
> - dc->desc = "VFIO-based PCI device assignment";
> + device_class_set_props(dc, vfio_pci_base_dev_properties);
> + dc->desc = "VFIO PCI base device";
> set_bit(DEVICE_CATEGORY_MISC, dc->categories);
> - pdc->realize = vfio_realize;
> pdc->exit = vfio_exitfn;
> pdc->config_read = vfio_pci_read_config;
> pdc->config_write = vfio_pci_write_config;
> }
>
> -static const TypeInfo vfio_pci_dev_info = {
> - .name = TYPE_VFIO_PCI,
> +static const TypeInfo vfio_pci_base_dev_info = {
> + .name = TYPE_VFIO_PCI_BASE,
> .parent = TYPE_PCI_DEVICE,
> - .instance_size = sizeof(VFIOPCIDevice),
> - .class_init = vfio_pci_dev_class_init,
> - .instance_init = vfio_instance_init,
> - .instance_finalize = vfio_instance_finalize,
> + .instance_size = 0,
> + .abstract = true,
> + .class_init = vfio_pci_base_dev_class_init,
> .interfaces = (InterfaceInfo[]) {
> { INTERFACE_PCIE_DEVICE },
> { INTERFACE_CONVENTIONAL_PCI_DEVICE },
> @@ -3346,6 +3325,48 @@ static const TypeInfo vfio_pci_dev_info = {
> },
> };
>
> +static Property vfio_pci_dev_properties[] = {
> + DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice, host),
> + DEFINE_PROP_STRING("sysfsdev", VFIOPCIDevice, vbasedev.sysfsdev),
> + DEFINE_PROP_ON_OFF_AUTO("display", VFIOPCIDevice,
> + display, ON_OFF_AUTO_OFF),
> + DEFINE_PROP_UINT32("xres", VFIOPCIDevice, display_xres, 0),
> + DEFINE_PROP_UINT32("yres", VFIOPCIDevice, display_yres, 0),
> + DEFINE_PROP_BIT("x-vga", VFIOPCIDevice, features,
> + VFIO_FEATURE_ENABLE_VGA_BIT, false),
> + DEFINE_PROP_BIT("x-req", VFIOPCIDevice, features,
> + VFIO_FEATURE_ENABLE_REQ_BIT, true),
> + DEFINE_PROP_BIT("x-igd-opregion", VFIOPCIDevice, features,
> + VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT, false),
> + DEFINE_PROP_BOOL("x-no-geforce-quirks", VFIOPCIDevice,
> + no_geforce_quirks, false),
> + DEFINE_PROP_UINT32("x-igd-gms", VFIOPCIDevice, igd_gms, 0),
> + DEFINE_PROP_UNSIGNED_NODEFAULT("x-nv-gpudirect-clique", VFIOPCIDevice,
> + nv_gpudirect_clique,
> + qdev_prop_nv_gpudirect_clique, uint8_t),
> + DEFINE_PROP_END_OF_LIST(),
> +};
> +
> +static void vfio_pci_dev_class_init(ObjectClass *klass, void *data)
> +{
> + DeviceClass *dc = DEVICE_CLASS(klass);
> + PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass);
> +
> + dc->reset = vfio_pci_reset;
> + device_class_set_props(dc, vfio_pci_dev_properties);
> + dc->desc = "VFIO-based PCI device assignment";
> + pdc->realize = vfio_realize;
> +}
> +
> +static const TypeInfo vfio_pci_dev_info = {
> + .name = TYPE_VFIO_PCI,
> + .parent = TYPE_VFIO_PCI_BASE,
> + .instance_size = sizeof(VFIOKernPCIDevice),
> + .class_init = vfio_pci_dev_class_init,
> + .instance_init = vfio_instance_init,
> + .instance_finalize = vfio_instance_finalize,
> +};
> +
> static Property vfio_pci_dev_nohotplug_properties[] = {
> DEFINE_PROP_BOOL("ramfb", VFIOPCIDevice, enable_ramfb, false),
> DEFINE_PROP_END_OF_LIST(),
> @@ -3362,12 +3383,13 @@ static void vfio_pci_nohotplug_dev_class_init(ObjectClass *klass, void *data)
> static const TypeInfo vfio_pci_nohotplug_dev_info = {
> .name = TYPE_VFIO_PCI_NOHOTPLUG,
> .parent = TYPE_VFIO_PCI,
> - .instance_size = sizeof(VFIOPCIDevice),
> + .instance_size = sizeof(VFIOKernPCIDevice),
> .class_init = vfio_pci_nohotplug_dev_class_init,
> };
>
> static void register_vfio_pci_dev_type(void)
> {
> + type_register_static(&vfio_pci_base_dev_info);
> type_register_static(&vfio_pci_dev_info);
> type_register_static(&vfio_pci_nohotplug_dev_info);
> }
> diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h
> index 7c236a5..7c5c8ec 100644
> --- a/hw/vfio/pci.h
> +++ b/hw/vfio/pci.h
> @@ -115,8 +115,13 @@ typedef struct VFIOMSIXInfo {
> unsigned long *pending;
> } VFIOMSIXInfo;
>
> -#define TYPE_VFIO_PCI "vfio-pci"
> -OBJECT_DECLARE_SIMPLE_TYPE(VFIOPCIDevice, VFIO_PCI)
> +/*
> + * TYPE_VFIO_PCI_BASE is an abstract type used to share code
> + * between VFIO implementations that use a kernel driver
> + * with those that use user sockets.
> + */
> +#define TYPE_VFIO_PCI_BASE "vfio-pci-base"
> +OBJECT_DECLARE_SIMPLE_TYPE(VFIOPCIDevice, VFIO_PCI_BASE)
>
> struct VFIOPCIDevice {
> PCIDevice pdev;
> @@ -177,6 +182,13 @@ struct VFIOPCIDevice {
> Notifier irqchip_change_notifier;
> };
>
> +#define TYPE_VFIO_PCI "vfio-pci"
> +OBJECT_DECLARE_SIMPLE_TYPE(VFIOKernPCIDevice, VFIO_PCI)
> +
> +struct VFIOKernPCIDevice {
> + VFIOPCIDevice device;
> +};
> +
> /* Use uin32_t for vendor & device so PCI_ANY_ID expands and cannot match hw */
> static inline bool vfio_pci_is(VFIOPCIDevice *vdev, uint32_t vendor, uint32_t device)
> {
I can look into using orderfile
JJ
> On Dec 9, 2022, at 8:04 AM, Cédric Le Goater <clg@redhat.com> wrote:
>
> Hello John,
>
> On 11/9/22 00:13, John Johnson wrote:
>> Add an abstract base class both the kernel driver
>> and user socket implementations can use to share code.
>> Signed-off-by: John G Johnson <john.g.johnson@oracle.com>
>> Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com>
>> Signed-off-by: Jagannathan Raman <jag.raman@oracle.com>
>
> I would help the reader if the header files came first. You could use :
>
> [diff]
> orderFile = /path/to/qemu/scripts/git.orderfile
>
>
> I would simply use 'Kernel' instead of 'Kern' in the type definition.
> A part from that,
>
> Reviewed-by: Cédric Le Goater <clg@redhat.com>
>
> Thanks,
>
> C.
>
>> ---
>> hw/vfio/pci.c | 106 +++++++++++++++++++++++++++++++++++-----------------------
>> hw/vfio/pci.h | 16 +++++++--
>> 2 files changed, 78 insertions(+), 44 deletions(-)
>> diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
>> index 939dcc3..60acde5 100644
>> --- a/hw/vfio/pci.c
>> +++ b/hw/vfio/pci.c
>> @@ -235,7 +235,7 @@ static void vfio_intx_update(VFIOPCIDevice *vdev, PCIINTxRoute *route)
>> static void vfio_intx_routing_notifier(PCIDevice *pdev)
>> {
>> - VFIOPCIDevice *vdev = VFIO_PCI(pdev);
>> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
>> PCIINTxRoute route;
>> if (vdev->interrupt != VFIO_INT_INTx) {
>> @@ -467,7 +467,7 @@ static void vfio_update_kvm_msi_virq(VFIOMSIVector *vector, MSIMessage msg,
>> static int vfio_msix_vector_do_use(PCIDevice *pdev, unsigned int nr,
>> MSIMessage *msg, IOHandler *handler)
>> {
>> - VFIOPCIDevice *vdev = VFIO_PCI(pdev);
>> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
>> VFIOMSIVector *vector;
>> int ret;
>> @@ -561,7 +561,7 @@ static int vfio_msix_vector_use(PCIDevice *pdev,
>> static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr)
>> {
>> - VFIOPCIDevice *vdev = VFIO_PCI(pdev);
>> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
>> VFIOMSIVector *vector = &vdev->msi_vectors[nr];
>> trace_vfio_msix_vector_release(vdev->vbasedev.name, nr);
>> @@ -1109,7 +1109,7 @@ static const MemoryRegionOps vfio_vga_ops = {
>> */
>> static void vfio_sub_page_bar_update_mapping(PCIDevice *pdev, int bar)
>> {
>> - VFIOPCIDevice *vdev = VFIO_PCI(pdev);
>> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
>> VFIORegion *region = &vdev->bars[bar].region;
>> MemoryRegion *mmap_mr, *region_mr, *base_mr;
>> PCIIORegion *r;
>> @@ -1155,7 +1155,7 @@ static void vfio_sub_page_bar_update_mapping(PCIDevice *pdev, int bar)
>> */
>> uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len)
>> {
>> - VFIOPCIDevice *vdev = VFIO_PCI(pdev);
>> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
>> uint32_t emu_bits = 0, emu_val = 0, phys_val = 0, val;
>> memcpy(&emu_bits, vdev->emulated_config_bits + addr, len);
>> @@ -1188,7 +1188,7 @@ uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len)
>> void vfio_pci_write_config(PCIDevice *pdev,
>> uint32_t addr, uint32_t val, int len)
>> {
>> - VFIOPCIDevice *vdev = VFIO_PCI(pdev);
>> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
>> uint32_t val_le = cpu_to_le32(val);
>> trace_vfio_pci_write_config(vdev->vbasedev.name, addr, val, len);
>> @@ -2845,7 +2845,7 @@ static void vfio_unregister_req_notifier(VFIOPCIDevice *vdev)
>> static void vfio_realize(PCIDevice *pdev, Error **errp)
>> {
>> - VFIOPCIDevice *vdev = VFIO_PCI(pdev);
>> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
>> VFIODevice *vbasedev = &vdev->vbasedev;
>> VFIODevice *vbasedev_iter;
>> VFIOGroup *group;
>> @@ -3169,7 +3169,7 @@ error:
>> static void vfio_instance_finalize(Object *obj)
>> {
>> - VFIOPCIDevice *vdev = VFIO_PCI(obj);
>> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(obj);
>> VFIOGroup *group = vdev->vbasedev.group;
>> vfio_display_finalize(vdev);
>> @@ -3189,7 +3189,7 @@ static void vfio_instance_finalize(Object *obj)
>> static void vfio_exitfn(PCIDevice *pdev)
>> {
>> - VFIOPCIDevice *vdev = VFIO_PCI(pdev);
>> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
>> vfio_unregister_req_notifier(vdev);
>> vfio_unregister_err_notifier(vdev);
>> @@ -3208,7 +3208,7 @@ static void vfio_exitfn(PCIDevice *pdev)
>> static void vfio_pci_reset(DeviceState *dev)
>> {
>> - VFIOPCIDevice *vdev = VFIO_PCI(dev);
>> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(dev);
>> trace_vfio_pci_reset(vdev->vbasedev.name);
>> @@ -3248,7 +3248,7 @@ post_reset:
>> static void vfio_instance_init(Object *obj)
>> {
>> PCIDevice *pci_dev = PCI_DEVICE(obj);
>> - VFIOPCIDevice *vdev = VFIO_PCI(obj);
>> + VFIOPCIDevice *vdev = VFIO_PCI_BASE(obj);
>> device_add_bootindex_property(obj, &vdev->bootindex,
>> "bootindex", NULL,
>> @@ -3265,24 +3265,12 @@ static void vfio_instance_init(Object *obj)
>> pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
>> }
>> -static Property vfio_pci_dev_properties[] = {
>> - DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice, host),
>> - DEFINE_PROP_STRING("sysfsdev", VFIOPCIDevice, vbasedev.sysfsdev),
>> +static Property vfio_pci_base_dev_properties[] = {
>> DEFINE_PROP_ON_OFF_AUTO("x-pre-copy-dirty-page-tracking", VFIOPCIDevice,
>> vbasedev.pre_copy_dirty_page_tracking,
>> ON_OFF_AUTO_ON),
>> - DEFINE_PROP_ON_OFF_AUTO("display", VFIOPCIDevice,
>> - display, ON_OFF_AUTO_OFF),
>> - DEFINE_PROP_UINT32("xres", VFIOPCIDevice, display_xres, 0),
>> - DEFINE_PROP_UINT32("yres", VFIOPCIDevice, display_yres, 0),
>> DEFINE_PROP_UINT32("x-intx-mmap-timeout-ms", VFIOPCIDevice,
>> intx.mmap_timeout, 1100),
>> - DEFINE_PROP_BIT("x-vga", VFIOPCIDevice, features,
>> - VFIO_FEATURE_ENABLE_VGA_BIT, false),
>> - DEFINE_PROP_BIT("x-req", VFIOPCIDevice, features,
>> - VFIO_FEATURE_ENABLE_REQ_BIT, true),
>> - DEFINE_PROP_BIT("x-igd-opregion", VFIOPCIDevice, features,
>> - VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT, false),
>> DEFINE_PROP_BOOL("x-enable-migration", VFIOPCIDevice,
>> vbasedev.enable_migration, false),
>> DEFINE_PROP_BOOL("x-no-mmap", VFIOPCIDevice, vbasedev.no_mmap, false),
>> @@ -3291,8 +3279,6 @@ static Property vfio_pci_dev_properties[] = {
>> DEFINE_PROP_BOOL("x-no-kvm-intx", VFIOPCIDevice, no_kvm_intx, false),
>> DEFINE_PROP_BOOL("x-no-kvm-msi", VFIOPCIDevice, no_kvm_msi, false),
>> DEFINE_PROP_BOOL("x-no-kvm-msix", VFIOPCIDevice, no_kvm_msix, false),
>> - DEFINE_PROP_BOOL("x-no-geforce-quirks", VFIOPCIDevice,
>> - no_geforce_quirks, false),
>> DEFINE_PROP_BOOL("x-no-kvm-ioeventfd", VFIOPCIDevice, no_kvm_ioeventfd,
>> false),
>> DEFINE_PROP_BOOL("x-no-vfio-ioeventfd", VFIOPCIDevice, no_vfio_ioeventfd,
>> @@ -3303,10 +3289,6 @@ static Property vfio_pci_dev_properties[] = {
>> sub_vendor_id, PCI_ANY_ID),
>> DEFINE_PROP_UINT32("x-pci-sub-device-id", VFIOPCIDevice,
>> sub_device_id, PCI_ANY_ID),
>> - DEFINE_PROP_UINT32("x-igd-gms", VFIOPCIDevice, igd_gms, 0),
>> - DEFINE_PROP_UNSIGNED_NODEFAULT("x-nv-gpudirect-clique", VFIOPCIDevice,
>> - nv_gpudirect_clique,
>> - qdev_prop_nv_gpudirect_clique, uint8_t),
>> DEFINE_PROP_OFF_AUTO_PCIBAR("x-msix-relocation", VFIOPCIDevice, msix_relo,
>> OFF_AUTOPCIBAR_OFF),
>> /*
>> @@ -3317,28 +3299,25 @@ static Property vfio_pci_dev_properties[] = {
>> DEFINE_PROP_END_OF_LIST(),
>> };
>> -static void vfio_pci_dev_class_init(ObjectClass *klass, void *data)
>> +static void vfio_pci_base_dev_class_init(ObjectClass *klass, void *data)
>> {
>> DeviceClass *dc = DEVICE_CLASS(klass);
>> PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass);
>> - dc->reset = vfio_pci_reset;
>> - device_class_set_props(dc, vfio_pci_dev_properties);
>> - dc->desc = "VFIO-based PCI device assignment";
>> + device_class_set_props(dc, vfio_pci_base_dev_properties);
>> + dc->desc = "VFIO PCI base device";
>> set_bit(DEVICE_CATEGORY_MISC, dc->categories);
>> - pdc->realize = vfio_realize;
>> pdc->exit = vfio_exitfn;
>> pdc->config_read = vfio_pci_read_config;
>> pdc->config_write = vfio_pci_write_config;
>> }
>> -static const TypeInfo vfio_pci_dev_info = {
>> - .name = TYPE_VFIO_PCI,
>> +static const TypeInfo vfio_pci_base_dev_info = {
>> + .name = TYPE_VFIO_PCI_BASE,
>> .parent = TYPE_PCI_DEVICE,
>> - .instance_size = sizeof(VFIOPCIDevice),
>> - .class_init = vfio_pci_dev_class_init,
>> - .instance_init = vfio_instance_init,
>> - .instance_finalize = vfio_instance_finalize,
>> + .instance_size = 0,
>> + .abstract = true,
>> + .class_init = vfio_pci_base_dev_class_init,
>> .interfaces = (InterfaceInfo[]) {
>> { INTERFACE_PCIE_DEVICE },
>> { INTERFACE_CONVENTIONAL_PCI_DEVICE },
>> @@ -3346,6 +3325,48 @@ static const TypeInfo vfio_pci_dev_info = {
>> },
>> };
>> +static Property vfio_pci_dev_properties[] = {
>> + DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice, host),
>> + DEFINE_PROP_STRING("sysfsdev", VFIOPCIDevice, vbasedev.sysfsdev),
>> + DEFINE_PROP_ON_OFF_AUTO("display", VFIOPCIDevice,
>> + display, ON_OFF_AUTO_OFF),
>> + DEFINE_PROP_UINT32("xres", VFIOPCIDevice, display_xres, 0),
>> + DEFINE_PROP_UINT32("yres", VFIOPCIDevice, display_yres, 0),
>> + DEFINE_PROP_BIT("x-vga", VFIOPCIDevice, features,
>> + VFIO_FEATURE_ENABLE_VGA_BIT, false),
>> + DEFINE_PROP_BIT("x-req", VFIOPCIDevice, features,
>> + VFIO_FEATURE_ENABLE_REQ_BIT, true),
>> + DEFINE_PROP_BIT("x-igd-opregion", VFIOPCIDevice, features,
>> + VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT, false),
>> + DEFINE_PROP_BOOL("x-no-geforce-quirks", VFIOPCIDevice,
>> + no_geforce_quirks, false),
>> + DEFINE_PROP_UINT32("x-igd-gms", VFIOPCIDevice, igd_gms, 0),
>> + DEFINE_PROP_UNSIGNED_NODEFAULT("x-nv-gpudirect-clique", VFIOPCIDevice,
>> + nv_gpudirect_clique,
>> + qdev_prop_nv_gpudirect_clique, uint8_t),
>> + DEFINE_PROP_END_OF_LIST(),
>> +};
>> +
>> +static void vfio_pci_dev_class_init(ObjectClass *klass, void *data)
>> +{
>> + DeviceClass *dc = DEVICE_CLASS(klass);
>> + PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass);
>> +
>> + dc->reset = vfio_pci_reset;
>> + device_class_set_props(dc, vfio_pci_dev_properties);
>> + dc->desc = "VFIO-based PCI device assignment";
>> + pdc->realize = vfio_realize;
>> +}
>> +
>> +static const TypeInfo vfio_pci_dev_info = {
>> + .name = TYPE_VFIO_PCI,
>> + .parent = TYPE_VFIO_PCI_BASE,
>> + .instance_size = sizeof(VFIOKernPCIDevice),
>> + .class_init = vfio_pci_dev_class_init,
>> + .instance_init = vfio_instance_init,
>> + .instance_finalize = vfio_instance_finalize,
>> +};
>> +
>> static Property vfio_pci_dev_nohotplug_properties[] = {
>> DEFINE_PROP_BOOL("ramfb", VFIOPCIDevice, enable_ramfb, false),
>> DEFINE_PROP_END_OF_LIST(),
>> @@ -3362,12 +3383,13 @@ static void vfio_pci_nohotplug_dev_class_init(ObjectClass *klass, void *data)
>> static const TypeInfo vfio_pci_nohotplug_dev_info = {
>> .name = TYPE_VFIO_PCI_NOHOTPLUG,
>> .parent = TYPE_VFIO_PCI,
>> - .instance_size = sizeof(VFIOPCIDevice),
>> + .instance_size = sizeof(VFIOKernPCIDevice),
>> .class_init = vfio_pci_nohotplug_dev_class_init,
>> };
>> static void register_vfio_pci_dev_type(void)
>> {
>> + type_register_static(&vfio_pci_base_dev_info);
>> type_register_static(&vfio_pci_dev_info);
>> type_register_static(&vfio_pci_nohotplug_dev_info);
>> }
>> diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h
>> index 7c236a5..7c5c8ec 100644
>> --- a/hw/vfio/pci.h
>> +++ b/hw/vfio/pci.h
>> @@ -115,8 +115,13 @@ typedef struct VFIOMSIXInfo {
>> unsigned long *pending;
>> } VFIOMSIXInfo;
>> -#define TYPE_VFIO_PCI "vfio-pci"
>> -OBJECT_DECLARE_SIMPLE_TYPE(VFIOPCIDevice, VFIO_PCI)
>> +/*
>> + * TYPE_VFIO_PCI_BASE is an abstract type used to share code
>> + * between VFIO implementations that use a kernel driver
>> + * with those that use user sockets.
>> + */
>> +#define TYPE_VFIO_PCI_BASE "vfio-pci-base"
>> +OBJECT_DECLARE_SIMPLE_TYPE(VFIOPCIDevice, VFIO_PCI_BASE)
>> struct VFIOPCIDevice {
>> PCIDevice pdev;
>> @@ -177,6 +182,13 @@ struct VFIOPCIDevice {
>> Notifier irqchip_change_notifier;
>> };
>> +#define TYPE_VFIO_PCI "vfio-pci"
>> +OBJECT_DECLARE_SIMPLE_TYPE(VFIOKernPCIDevice, VFIO_PCI)
>> +
>> +struct VFIOKernPCIDevice {
>> + VFIOPCIDevice device;
>> +};
>> +
>> /* Use uin32_t for vendor & device so PCI_ANY_ID expands and cannot match hw */
>> static inline bool vfio_pci_is(VFIOPCIDevice *vdev, uint32_t vendor, uint32_t device)
>> {
>
On Tue, Nov 08, 2022 at 03:13:24PM -0800, John Johnson wrote: > Add an abstract base class both the kernel driver > and user socket implementations can use to share code. LGTM Reviewed-by: John Levon <john.levon@nutanix.com> regards john
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