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[PATCH v2 0/5] Mac Old World ROM experiment

BALATON Zoltan posted 5 patches 3 years, 11 months ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/cover.1592055375.git.balaton@eik.bme.hu
Maintainers: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>, David Gibson <david@gibson.dropbear.id.au>
There is a newer version of this series
hw/pci-host/grackle.c |  2 +-
hw/ppc/mac.h          | 12 +++++++++
hw/ppc/mac_oldworld.c | 59 +++++++++++++++++++++++++++++++++----------
3 files changed, 59 insertions(+), 14 deletions(-)
[PATCH v2 0/5] Mac Old World ROM experiment
Posted by BALATON Zoltan 3 years, 11 months ago 
Version 2 with some more tweaks this now starts but drops in a Serial
Test Manager (see below) presumably because some POST step is failing,
I let others who know more about this machine figure out what's
missing from here.

Regards,
BALATON Zoltan


      1 :pci_update_mappings_add d=0x55a1bb6254a0 00:01.0 0,0xf3000000+0x80000
      1 pci_cfg_read grackle 00:0 @0x0 -> 0x21057
      1 pci_cfg_read grackle 00:0 @0xa8 -> 0x0
      1 pci_cfg_write grackle 00:0 @0xa8 <- 0x40e0c
      1 pci_cfg_read grackle 00:0 @0xac -> 0x0
      1 pci_cfg_write grackle 00:0 @0xac <- 0x12000000
      1 pci_cfg_read grackle 00:0 @0xac -> 0x12000000
      1 pci_cfg_write grackle 00:0 @0xac <- 0x2000000
      1 pci_cfg_read grackle 00:0 @0x70 -> 0x0
      1 pci_cfg_write grackle 00:0 @0x70 <- 0x11000000
      1 machine_id_read(0, 2)
      1 pci_cfg_read grackle 00:0 @0x8 -> 0x6000140
      1 pci_cfg_read grackle 00:0 @0xf0 -> 0x0
      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12900000
      1 machine_id_read(0, 2)
      1 portA_write unimplemented
      1 CUDA: unknown command 0x22
      1 CUDA: unknown command 0x26
      3 CUDA: unknown command 0x25
      1 pci_cfg_write grackle 00:0 @0x80 <- 0xffffffff
      1 pci_cfg_write grackle 00:0 @0x88 <- 0xffffffff
      1 pci_cfg_write grackle 00:0 @0x90 <- 0xffffffff
      1 pci_cfg_write grackle 00:0 @0x98 <- 0xffffffff
      1 pci_cfg_write grackle 00:0 @0x84 <- 0xffffffff
      1 pci_cfg_write grackle 00:0 @0x8c <- 0xffffffff
      1 pci_cfg_write grackle 00:0 @0x94 <- 0xffffffff
      1 pci_cfg_write grackle 00:0 @0x9c <- 0xffffffff
      1 pci_cfg_write grackle 00:0 @0xa0 <- 0x0
      1 pci_cfg_read grackle 00:0 @0xf0 -> 0x12900000
      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12900000
      1 machine_id_read(0, 2)
      1 pci_cfg_read grackle 00:0 @0x8 -> 0x6000140
      1 pci_cfg_read grackle 00:0 @0xf0 -> 0x12900000
      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12940000
      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12940000
      1 pci_cfg_write grackle 00:0 @0xf4 <- 0x40010fe4
      1 pci_cfg_write grackle 00:0 @0xf8 <- 0x7302293
      1 pci_cfg_write grackle 00:0 @0xfc <- 0x25302220
      1 pci_cfg_read grackle 00:0 @0xa0 -> 0x0
      1 pci_cfg_write grackle 00:0 @0xa0 <- 0x67000000
      1 pci_cfg_read grackle 00:0 @0xf0 -> 0x12940000
      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x129c0000
 550755 Unassigned mem read 00000000f3014020
      1 
      1 >?
      1 ***************************************
      1 *                                     *
      1 *         Serial Test Manager         *
      1 *                                     *
      1 ***************************************
      1 
      1 T)  Execute a test, single test number follows command
      1 T0) Run ROM Checksum Test
      1 T1) Run Address Line Test
      1 T2) Run Data Line Test
      1 T3) Run Simple RAM Test
      1 T4) Run Mod3 Forward Test
      1 T5) Run Mod3 Reverse Test
      1 T6) Run NVRAM Test
      1 T8) Run AddrPattern Test
      1 T9) Run NTAWord Test
      1 A)  Execute all ROM-based tests
      1 Q)  Quick test
      1 X)  Exit STM (Continue booting)
      1 ?)  Print this menu
      1 
      1 >

BALATON Zoltan (5):
  mac_oldworld: Allow loading binary ROM image
  mac_oldworld: Add machine ID register
  grackle: Set revision in PCI config to match hardware
  mac_oldworld: Rename ppc_heathrow_reset reset to
    ppc_heathrow_cpu_reset
  mac_oldworld: Map macio to expected address at reset

 hw/pci-host/grackle.c |  2 +-
 hw/ppc/mac.h          | 12 +++++++++
 hw/ppc/mac_oldworld.c | 59 +++++++++++++++++++++++++++++++++----------
 3 files changed, 59 insertions(+), 14 deletions(-)

-- 
2.21.3
Re: [PATCH v2 0/5] Mac Old World ROM experiment
Posted by BALATON Zoltan 3 years, 11 months ago 
On Sat, 13 Jun 2020, BALATON Zoltan wrote:
> Version 2 with some more tweaks this now starts but drops in a Serial
> Test Manager (see below) presumably because some POST step is failing,
> I let others who know more about this machine figure out what's
> missing from here.
>
> Regards,
> BALATON Zoltan
>
>
>      1 :pci_update_mappings_add d=0x55a1bb6254a0 00:01.0 0,0xf3000000+0x80000
>      1 pci_cfg_read grackle 00:0 @0x0 -> 0x21057
>      1 pci_cfg_read grackle 00:0 @0xa8 -> 0x0
>      1 pci_cfg_write grackle 00:0 @0xa8 <- 0x40e0c
>      1 pci_cfg_read grackle 00:0 @0xac -> 0x0
>      1 pci_cfg_write grackle 00:0 @0xac <- 0x12000000
>      1 pci_cfg_read grackle 00:0 @0xac -> 0x12000000
>      1 pci_cfg_write grackle 00:0 @0xac <- 0x2000000
>      1 pci_cfg_read grackle 00:0 @0x70 -> 0x0
>      1 pci_cfg_write grackle 00:0 @0x70 <- 0x11000000
>      1 machine_id_read(0, 2)
>      1 pci_cfg_read grackle 00:0 @0x8 -> 0x6000140
>      1 pci_cfg_read grackle 00:0 @0xf0 -> 0x0
>      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12900000
>      1 machine_id_read(0, 2)
>      1 portA_write unimplemented
>      1 CUDA: unknown command 0x22
>      1 CUDA: unknown command 0x26
>      3 CUDA: unknown command 0x25
>      1 pci_cfg_write grackle 00:0 @0x80 <- 0xffffffff
>      1 pci_cfg_write grackle 00:0 @0x88 <- 0xffffffff
>      1 pci_cfg_write grackle 00:0 @0x90 <- 0xffffffff
>      1 pci_cfg_write grackle 00:0 @0x98 <- 0xffffffff
>      1 pci_cfg_write grackle 00:0 @0x84 <- 0xffffffff
>      1 pci_cfg_write grackle 00:0 @0x8c <- 0xffffffff
>      1 pci_cfg_write grackle 00:0 @0x94 <- 0xffffffff
>      1 pci_cfg_write grackle 00:0 @0x9c <- 0xffffffff
>      1 pci_cfg_write grackle 00:0 @0xa0 <- 0x0
>      1 pci_cfg_read grackle 00:0 @0xf0 -> 0x12900000
>      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12900000
>      1 machine_id_read(0, 2)
>      1 pci_cfg_read grackle 00:0 @0x8 -> 0x6000140
>      1 pci_cfg_read grackle 00:0 @0xf0 -> 0x12900000
>      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12940000
>      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12940000
>      1 pci_cfg_write grackle 00:0 @0xf4 <- 0x40010fe4
>      1 pci_cfg_write grackle 00:0 @0xf8 <- 0x7302293
>      1 pci_cfg_write grackle 00:0 @0xfc <- 0x25302220
>      1 pci_cfg_read grackle 00:0 @0xa0 -> 0x0
>      1 pci_cfg_write grackle 00:0 @0xa0 <- 0x67000000
>      1 pci_cfg_read grackle 00:0 @0xf0 -> 0x12940000
>      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x129c0000
> 550755 Unassigned mem read 00000000f3014020

So this seems to be the missing sound device (maybe trying to play the 
startup chime). Adding some dummy implementation there gets me a little 
bit further:

       2 macio: screamer read 20  4
       1 macio: screamer write 10  4 = 600000
       1 macio: screamer read 10  4
       2 macio: screamer read 20  4
       1 macio: screamer write 10  4 = 8220000
       1 macio: screamer read 10  4
       1 macio: screamer write 10  4 = 0
       1 macio: screamer read 10  4
       7 CUDA: unknown command 0x22
       2 macio: screamer read 20  4
       1 macio: screamer write 10  4 = 180000
       1 macio: screamer read 10  4
       1 CUDA: unknown command 0x22
       1 macio: screamer read 0  4
       1 macio: screamer write 0  4 = 11050000
       1 dbdma_unassigned_flush: use of unassigned channel 16
       1 dbdma_unassigned_rw: use of unassigned channel 16
       1 Unassigned mem write 0000000000240020 = 0x10006238
       1 Unassigned mem write 0000000000240024 = 0xffe32c00
       1 Unassigned mem write 0000000000240028 = 0x0
       1 Unassigned mem write 000000000024002c = 0x84006238

then stops here, I guess it may be waiting for an interrupt so probably we 
need Mark's screamer implementation to move on. Mark, any chance you can 
look at this sometimes? Why is your email address stripped from emails 
coming from the list? Is that a list setting to exclude you from replies?

Regards,
BALATON Zoltan
Re: [PATCH v2 0/5] Mac Old World ROM experiment
Posted by BALATON Zoltan 3 years, 11 months ago 
On Sat, 13 Jun 2020, BALATON Zoltan wrote:
> On Sat, 13 Jun 2020, BALATON Zoltan wrote:
>> Version 2 with some more tweaks this now starts but drops in a Serial
>> Test Manager (see below) presumably because some POST step is failing,
>> I let others who know more about this machine figure out what's
>> missing from here.
>> 
>> Regards,
>> BALATON Zoltan
>> 
>>
>>      1 :pci_update_mappings_add d=0x55a1bb6254a0 00:01.0 
>> 0,0xf3000000+0x80000
>>      1 pci_cfg_read grackle 00:0 @0x0 -> 0x21057
>>      1 pci_cfg_read grackle 00:0 @0xa8 -> 0x0
>>      1 pci_cfg_write grackle 00:0 @0xa8 <- 0x40e0c
>>      1 pci_cfg_read grackle 00:0 @0xac -> 0x0
>>      1 pci_cfg_write grackle 00:0 @0xac <- 0x12000000
>>      1 pci_cfg_read grackle 00:0 @0xac -> 0x12000000
>>      1 pci_cfg_write grackle 00:0 @0xac <- 0x2000000
>>      1 pci_cfg_read grackle 00:0 @0x70 -> 0x0
>>      1 pci_cfg_write grackle 00:0 @0x70 <- 0x11000000
>>      1 machine_id_read(0, 2)
>>      1 pci_cfg_read grackle 00:0 @0x8 -> 0x6000140
>>      1 pci_cfg_read grackle 00:0 @0xf0 -> 0x0
>>      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12900000
>>      1 machine_id_read(0, 2)
>>      1 portA_write unimplemented
>>      1 CUDA: unknown command 0x22
>>      1 CUDA: unknown command 0x26
>>      3 CUDA: unknown command 0x25
>>      1 pci_cfg_write grackle 00:0 @0x80 <- 0xffffffff
>>      1 pci_cfg_write grackle 00:0 @0x88 <- 0xffffffff
>>      1 pci_cfg_write grackle 00:0 @0x90 <- 0xffffffff
>>      1 pci_cfg_write grackle 00:0 @0x98 <- 0xffffffff
>>      1 pci_cfg_write grackle 00:0 @0x84 <- 0xffffffff
>>      1 pci_cfg_write grackle 00:0 @0x8c <- 0xffffffff
>>      1 pci_cfg_write grackle 00:0 @0x94 <- 0xffffffff
>>      1 pci_cfg_write grackle 00:0 @0x9c <- 0xffffffff
>>      1 pci_cfg_write grackle 00:0 @0xa0 <- 0x0
>>      1 pci_cfg_read grackle 00:0 @0xf0 -> 0x12900000
>>      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12900000
>>      1 machine_id_read(0, 2)
>>      1 pci_cfg_read grackle 00:0 @0x8 -> 0x6000140
>>      1 pci_cfg_read grackle 00:0 @0xf0 -> 0x12900000
>>      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12940000
>>      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12940000
>>      1 pci_cfg_write grackle 00:0 @0xf4 <- 0x40010fe4
>>      1 pci_cfg_write grackle 00:0 @0xf8 <- 0x7302293
>>      1 pci_cfg_write grackle 00:0 @0xfc <- 0x25302220
>>      1 pci_cfg_read grackle 00:0 @0xa0 -> 0x0
>>      1 pci_cfg_write grackle 00:0 @0xa0 <- 0x67000000
>>      1 pci_cfg_read grackle 00:0 @0xf0 -> 0x12940000
>>      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x129c0000
>> 550755 Unassigned mem read 00000000f3014020
>
> So this seems to be the missing sound device (maybe trying to play the 
> startup chime). Adding some dummy implementation there gets me a little bit 
> further:
>
>      2 macio: screamer read 20  4
>      1 macio: screamer write 10  4 = 600000
>      1 macio: screamer read 10  4
>      2 macio: screamer read 20  4
>      1 macio: screamer write 10  4 = 8220000
>      1 macio: screamer read 10  4
>      1 macio: screamer write 10  4 = 0
>      1 macio: screamer read 10  4
>      7 CUDA: unknown command 0x22
>      2 macio: screamer read 20  4
>      1 macio: screamer write 10  4 = 180000
>      1 macio: screamer read 10  4
>      1 CUDA: unknown command 0x22
>      1 macio: screamer read 0  4
>      1 macio: screamer write 0  4 = 11050000
>      1 dbdma_unassigned_flush: use of unassigned channel 16
>      1 dbdma_unassigned_rw: use of unassigned channel 16
>      1 Unassigned mem write 0000000000240020 = 0x10006238
>      1 Unassigned mem write 0000000000240024 = 0xffe32c00
>      1 Unassigned mem write 0000000000240028 = 0x0
>      1 Unassigned mem write 000000000024002c = 0x84006238
>
> then stops here, I guess it may be waiting for an interrupt so probably we

Or maybe it's the missing i2c bus in cuda (CUDA commands 0x22 and 0x25 
above) which I can imagine may try to get SPD data from RAM to configure 
memory.

Regards,
BALATON Zoltan

Patchew 2.1-devel-0870f84

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