On Fri, 23 Aug 2019 16:38:07 PDT (-0700), Alistair Francis wrote:
> Dump the Hypervisor registers and the current Hypervisor state.
>
> While we are editing this code let's also dump stvec and scause.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
> target/riscv/cpu.c | 34 ++++++++++++++++++++++++++++++++++
> 1 file changed, 34 insertions(+)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index f13e298a36..be8f643fc2 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -220,18 +220,52 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags)
> CPURISCVState *env = &cpu->env;
> int i;
>
> +#if !defined(CONFIG_USER_ONLY)
> + if (riscv_has_ext(env, RVH)) {
> + qemu_fprintf(f, " %s %d\n", "V = ", riscv_cpu_virt_enabled(env));
> + }
> +#endif
> qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "pc ", env->pc);
> #ifndef CONFIG_USER_ONLY
> qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mhartid ", env->mhartid);
> qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mstatus ", env->mstatus);
> + if (riscv_has_ext(env, RVH)) {
> + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "hstatus ", env->hstatus);
> + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "bstatus ", env->vsstatus);
> + }
> qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mip ",
> (target_ulong)atomic_read(&env->mip));
> + if (riscv_has_ext(env, RVH)) {
> + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "vsip ",
> + (target_ulong)atomic_read(&env->vsip));
> + }
> qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mie ", env->mie);
> + if (riscv_has_ext(env, RVH)) {
> + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "vsie ", env->vsie);
> + }
> qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mideleg ", env->mideleg);
> + if (riscv_has_ext(env, RVH)) {
> + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "hideleg ", env->hideleg);
> + }
> qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "medeleg ", env->medeleg);
> + if (riscv_has_ext(env, RVH)) {
> + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "hedeleg ", env->hedeleg);
> + }
> qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mtvec ", env->mtvec);
> + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "stvec ", env->stvec);
> + if (riscv_has_ext(env, RVH)) {
> + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "vstvec ", env->vstvec);
> + }
> qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mepc ", env->mepc);
> + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "sepc ", env->sepc);
> + if (riscv_has_ext(env, RVH)) {
> + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "vsepc ", env->vsepc);
> + }
> qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mcause ", env->mcause);
> + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "scause ", env->scause);
> + if (riscv_has_ext(env, RVH)) {
> + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "vscause ", env->vscause);
> + }
> #endif
>
> for (i = 0; i < 32; i++) {
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>