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[Qemu-devel] [PATCH for 4.0 v2 2/2] riscv: plic: Log guest errors

Alistair Francis posted 2 patches 6 years, 10 months ago
Maintainers: Sagar Karandikar <sagark@eecs.berkeley.edu>, Palmer Dabbelt <palmer@sifive.com>, Alistair Francis <Alistair.Francis@wdc.com>, Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
There is a newer version of this series
[Qemu-devel] [PATCH for 4.0 v2 2/2] riscv: plic: Log guest errors
Posted by Alistair Francis 6 years, 10 months ago 
Instead of using error_report() to print guest errors let's use
qemu_log_mask(LOG_GUEST_ERROR,...) to log the error.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 hw/riscv/sifive_plic.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c
index 70a85cd075..7f373d6c9d 100644
--- a/hw/riscv/sifive_plic.c
+++ b/hw/riscv/sifive_plic.c
@@ -262,7 +262,9 @@ static uint64_t sifive_plic_read(void *opaque, hwaddr addr, unsigned size)
     }
 
 err:
-    error_report("plic: invalid register read: %08x", (uint32_t)addr);
+    qemu_log_mask(LOG_GUEST_ERROR,
+                  "%s: Invalid register read 0x%" HWADDR_PRIx "\n",
+                  __func__, addr);
     return 0;
 }
 
@@ -289,7 +291,9 @@ static void sifive_plic_write(void *opaque, hwaddr addr, uint64_t value,
     } else if (addr >= plic->pending_base && /* 1 bit per source */
                addr < plic->pending_base + (plic->num_sources >> 3))
     {
-        error_report("plic: invalid pending write: %08x", (uint32_t)addr);
+        qemu_log_mask(LOG_GUEST_ERROR,
+                      "%s: invalid pending write: 0x%" HWADDR_PRIx "",
+                      __func__, addr);
         return;
     } else if (addr >= plic->enable_base && /* 1 bit per source */
         addr < plic->enable_base + plic->num_addrs * plic->enable_stride)
@@ -339,7 +343,9 @@ static void sifive_plic_write(void *opaque, hwaddr addr, uint64_t value,
     }
 
 err:
-    error_report("plic: invalid register write: %08x", (uint32_t)addr);
+    qemu_log_mask(LOG_GUEST_ERROR,
+                  "%s: Invalid register write 0x%" HWADDR_PRIx "\n",
+                  __func__, addr);
 }
 
 static const MemoryRegionOps sifive_plic_ops = {
-- 
2.21.0
Re: [Qemu-devel] [PATCH for 4.0 v2 2/2] riscv: plic: Log guest errors
Posted by Alistair Francis 6 years, 10 months ago 
On Wed, Mar 27, 2019 at 11:51 AM Alistair Francis
<Alistair.Francis@wdc.com> wrote:
>
> Instead of using error_report() to print guest errors let's use
> qemu_log_mask(LOG_GUEST_ERROR,...) to log the error.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

I dropped Philippe's review in this series.
This should be included from v1:

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Alistair

> ---
>  hw/riscv/sifive_plic.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c
> index 70a85cd075..7f373d6c9d 100644
> --- a/hw/riscv/sifive_plic.c
> +++ b/hw/riscv/sifive_plic.c
> @@ -262,7 +262,9 @@ static uint64_t sifive_plic_read(void *opaque, hwaddr addr, unsigned size)
>      }
>
>  err:
> -    error_report("plic: invalid register read: %08x", (uint32_t)addr);
> +    qemu_log_mask(LOG_GUEST_ERROR,
> +                  "%s: Invalid register read 0x%" HWADDR_PRIx "\n",
> +                  __func__, addr);
>      return 0;
>  }
>
> @@ -289,7 +291,9 @@ static void sifive_plic_write(void *opaque, hwaddr addr, uint64_t value,
>      } else if (addr >= plic->pending_base && /* 1 bit per source */
>                 addr < plic->pending_base + (plic->num_sources >> 3))
>      {
> -        error_report("plic: invalid pending write: %08x", (uint32_t)addr);
> +        qemu_log_mask(LOG_GUEST_ERROR,
> +                      "%s: invalid pending write: 0x%" HWADDR_PRIx "",
> +                      __func__, addr);
>          return;
>      } else if (addr >= plic->enable_base && /* 1 bit per source */
>          addr < plic->enable_base + plic->num_addrs * plic->enable_stride)
> @@ -339,7 +343,9 @@ static void sifive_plic_write(void *opaque, hwaddr addr, uint64_t value,
>      }
>
>  err:
> -    error_report("plic: invalid register write: %08x", (uint32_t)addr);
> +    qemu_log_mask(LOG_GUEST_ERROR,
> +                  "%s: Invalid register write 0x%" HWADDR_PRIx "\n",
> +                  __func__, addr);
>  }
>
>  static const MemoryRegionOps sifive_plic_ops = {
> --
> 2.21.0
>
Re: [Qemu-devel] [PATCH for 4.0 v2 2/2] riscv: plic: Log guest errors
Posted by Palmer Dabbelt 6 years, 10 months ago 
On Wed, 27 Mar 2019 11:52:53 PDT (-0700), alistair23@gmail.com wrote:
> On Wed, Mar 27, 2019 at 11:51 AM Alistair Francis
> <Alistair.Francis@wdc.com> wrote:
>>
>> Instead of using error_report() to print guest errors let's use
>> qemu_log_mask(LOG_GUEST_ERROR,...) to log the error.
>>
>> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
>
> I dropped Philippe's review in this series.
> This should be included from v1:
>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

I got it.

>
> Alistair
>
>> ---
>>  hw/riscv/sifive_plic.c | 12 +++++++++---
>>  1 file changed, 9 insertions(+), 3 deletions(-)
>>
>> diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c
>> index 70a85cd075..7f373d6c9d 100644
>> --- a/hw/riscv/sifive_plic.c
>> +++ b/hw/riscv/sifive_plic.c
>> @@ -262,7 +262,9 @@ static uint64_t sifive_plic_read(void *opaque, hwaddr addr, unsigned size)
>>      }
>>
>>  err:
>> -    error_report("plic: invalid register read: %08x", (uint32_t)addr);
>> +    qemu_log_mask(LOG_GUEST_ERROR,
>> +                  "%s: Invalid register read 0x%" HWADDR_PRIx "\n",
>> +                  __func__, addr);
>>      return 0;
>>  }
>>
>> @@ -289,7 +291,9 @@ static void sifive_plic_write(void *opaque, hwaddr addr, uint64_t value,
>>      } else if (addr >= plic->pending_base && /* 1 bit per source */
>>                 addr < plic->pending_base + (plic->num_sources >> 3))
>>      {
>> -        error_report("plic: invalid pending write: %08x", (uint32_t)addr);
>> +        qemu_log_mask(LOG_GUEST_ERROR,
>> +                      "%s: invalid pending write: 0x%" HWADDR_PRIx "",
>> +                      __func__, addr);
>>          return;
>>      } else if (addr >= plic->enable_base && /* 1 bit per source */
>>          addr < plic->enable_base + plic->num_addrs * plic->enable_stride)
>> @@ -339,7 +343,9 @@ static void sifive_plic_write(void *opaque, hwaddr addr, uint64_t value,
>>      }
>>
>>  err:
>> -    error_report("plic: invalid register write: %08x", (uint32_t)addr);
>> +    qemu_log_mask(LOG_GUEST_ERROR,
>> +                  "%s: Invalid register write 0x%" HWADDR_PRIx "\n",
>> +                  __func__, addr);
>>  }
>>
>>  static const MemoryRegionOps sifive_plic_ops = {
>> --
>> 2.21.0
>>

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