[v1] Update the QEMU PLIC addresses

[Qemu-devel] [PATCH for 4.0 v1 0/5] Update the QEMU PLIC addresses

Alistair Francis posted 5 patches 5 years, 1 month ago

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git fetch https://github.com/patchew-project/qemu tags/patchew/cover.1553129005.git.alistair.francis@wdc.com

Maintainers: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>, Alistair Francis <Alistair.Francis@wdc.com>, Sagar Karandikar <sagark@eecs.berkeley.edu>, Palmer Dabbelt <palmer@sifive.com>

There is a newer version of this series

hw/riscv/sifive_plic.c      | 16 +++++++++++-----
hw/riscv/sifive_u.c         |  2 +-
include/hw/riscv/sifive_e.h |  2 +-
include/hw/riscv/sifive_u.h |  4 ++--
include/hw/riscv/virt.h     |  2 +-
5 files changed, 16 insertions(+), 10 deletions(-)

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[Qemu-devel] [PATCH for 4.0 v1 0/5] Update the QEMU PLIC addresses

Posted by Alistair Francis 5 years, 1 month ago

This series updates the PLIC address to match the documentation.

This fixes: https://github.com/riscv/opensbi/issues/97

Alistair Francis (5):
  riscv: plic: Fix incorrect irq calculation
  riscv: sifive_u: Fix PLIC priority base offset and numbering
  riscv: sifive_e: Fix PLIC priority base offset
  riscv: virt: Fix PLIC priority base offset
  riscv: plic: Log guest errors

 hw/riscv/sifive_plic.c      | 16 +++++++++++-----
 hw/riscv/sifive_u.c         |  2 +-
 include/hw/riscv/sifive_e.h |  2 +-
 include/hw/riscv/sifive_u.h |  4 ++--
 include/hw/riscv/virt.h     |  2 +-
 5 files changed, 16 insertions(+), 10 deletions(-)

-- 
2.21.0

Re: [Qemu-devel] [PATCH for 4.0 v1 0/5] Update the QEMU PLIC addresses

Posted by Alistair Francis 5 years, 1 month ago

On Wed, Mar 20, 2019 at 5:45 PM Alistair Francis
<Alistair.Francis@wdc.com> wrote:
>
> This series updates the PLIC address to match the documentation.
>
> This fixes: https://github.com/riscv/opensbi/issues/97
>
> Alistair Francis (5):
>   riscv: plic: Fix incorrect irq calculation
>   riscv: sifive_u: Fix PLIC priority base offset and numbering
>   riscv: sifive_e: Fix PLIC priority base offset
>   riscv: virt: Fix PLIC priority base offset
>   riscv: plic: Log guest errors

Ping! Can this make it into 4.0?

Alistair

>
>  hw/riscv/sifive_plic.c      | 16 +++++++++++-----
>  hw/riscv/sifive_u.c         |  2 +-
>  include/hw/riscv/sifive_e.h |  2 +-
>  include/hw/riscv/sifive_u.h |  4 ++--
>  include/hw/riscv/virt.h     |  2 +-
>  5 files changed, 16 insertions(+), 10 deletions(-)
>
> --
> 2.21.0
>

Re: [Qemu-devel] [PATCH for 4.0 v1 0/5] Update the QEMU PLIC addresses

Posted by Palmer Dabbelt 5 years, 1 month ago

On Tue, 26 Mar 2019 15:19:25 PDT (-0700), alistair23@gmail.com wrote:
> On Wed, Mar 20, 2019 at 5:45 PM Alistair Francis
> <Alistair.Francis@wdc.com> wrote:
>>
>> This series updates the PLIC address to match the documentation.
>>
>> This fixes: https://github.com/riscv/opensbi/issues/97
>>
>> Alistair Francis (5):
>>   riscv: plic: Fix incorrect irq calculation
>>   riscv: sifive_u: Fix PLIC priority base offset and numbering
>>   riscv: sifive_e: Fix PLIC priority base offset
>>   riscv: virt: Fix PLIC priority base offset
>>   riscv: plic: Log guest errors
>
> Ping! Can this make it into 4.0?

Sorry, I missed this one.  I'll take a look.

>
> Alistair
>
>>
>>  hw/riscv/sifive_plic.c      | 16 +++++++++++-----
>>  hw/riscv/sifive_u.c         |  2 +-
>>  include/hw/riscv/sifive_e.h |  2 +-
>>  include/hw/riscv/sifive_u.h |  4 ++--
>>  include/hw/riscv/virt.h     |  2 +-
>>  5 files changed, 16 insertions(+), 10 deletions(-)
>>
>> --
>> 2.21.0
>>