[v8] Connect a PCIe host and graphics support to RISC-V

[Qemu-devel] [PATCH v8 0/4] Connect a PCIe host and graphics support to RISC-V

Alistair Francis posted 4 patches 5 years, 4 months ago

Diff against v1 v2 v3 v4 v5 v6 v7
Download series mbox

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Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/cover.1544567709.git.alistair.francis@wdc.com

default-configs/riscv32-softmmu.mak |   8 +-
default-configs/riscv64-softmmu.mak |   8 +-
hw/riscv/virt.c                     | 147 ++++++++++++++++++++++++++--
include/hw/riscv/virt.h             |  15 ++-
4 files changed, 165 insertions(+), 13 deletions(-)

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[Qemu-devel] [PATCH v8 0/4] Connect a PCIe host and graphics support to RISC-V

Posted by Alistair Francis 5 years, 4 months ago

This series is now ready to be merged, all of the patches are reviewed
and tested.

Palmer can you take this with all the other RISC-V patches sent during
the freeze?

V8:
 - Drop SiFive U support
 - Drop legacy -nic support
 - Small other review changes
V7:
 - Fix the GPEX memory mapping thanks to Bin Meng
 - Fix the interrupt mapping thanks to Logan Gunthorpe
V6:
 - Fix the interrupt issue for the GPEX device
V5:
 - Rebase
 - Include pci.mak in the default configs
V4:
 - Fix the spike device tree
 - Don't use stdvga device
V3:
 - Remove Makefile config changes
 - Connect a network adapter to the virt device
V2:
 - Use the gpex PCIe host for virt
 - Add support for SiFive U PCIe


Alistair Francis (4):
  hw/riscv/virt: Increase the number of interrupts
  hw/riscv/virt: Adjust memory layout spacing
  hw/riscv/virt: Connect the gpex PCIe
  riscv: Enable VGA and PCIE_VGA

 default-configs/riscv32-softmmu.mak |   8 +-
 default-configs/riscv64-softmmu.mak |   8 +-
 hw/riscv/virt.c                     | 147 ++++++++++++++++++++++++++--
 include/hw/riscv/virt.h             |  15 ++-
 4 files changed, 165 insertions(+), 13 deletions(-)

-- 
2.19.1

Re: [Qemu-devel] [PATCH v8 0/4] Connect a PCIe host and graphics support to RISC-V

Posted by Palmer Dabbelt 5 years, 4 months ago

On Tue, 11 Dec 2018 14:37:07 PST (-0800), Alistair Francis wrote:
> This series is now ready to be merged, all of the patches are reviewed
> and tested.
>
> Palmer can you take this with all the other RISC-V patches sent during
> the freeze?

Yep, I'll be collecting everything this week.

Thanks!

>
> V8:
>  - Drop SiFive U support
>  - Drop legacy -nic support
>  - Small other review changes
> V7:
>  - Fix the GPEX memory mapping thanks to Bin Meng
>  - Fix the interrupt mapping thanks to Logan Gunthorpe
> V6:
>  - Fix the interrupt issue for the GPEX device
> V5:
>  - Rebase
>  - Include pci.mak in the default configs
> V4:
>  - Fix the spike device tree
>  - Don't use stdvga device
> V3:
>  - Remove Makefile config changes
>  - Connect a network adapter to the virt device
> V2:
>  - Use the gpex PCIe host for virt
>  - Add support for SiFive U PCIe
>
>
> Alistair Francis (4):
>   hw/riscv/virt: Increase the number of interrupts
>   hw/riscv/virt: Adjust memory layout spacing
>   hw/riscv/virt: Connect the gpex PCIe
>   riscv: Enable VGA and PCIE_VGA
>
>  default-configs/riscv32-softmmu.mak |   8 +-
>  default-configs/riscv64-softmmu.mak |   8 +-
>  hw/riscv/virt.c                     | 147 ++++++++++++++++++++++++++--
>  include/hw/riscv/virt.h             |  15 ++-
>  4 files changed, 165 insertions(+), 13 deletions(-)
>
> -- 
> 2.19.1