[Qemu-devel] [PATCH v6 5/5] target/ppc: Relax reserved bitmask of indexed store instructions

BALATON Zoltan posted 5 patches 7 years, 7 months ago
[Qemu-devel] [PATCH v6 5/5] target/ppc: Relax reserved bitmask of indexed store instructions
Posted by BALATON Zoltan 7 years, 7 months ago
The PPC440 User Manual says that if bit 31 is set, the contents of
CR[CR0] are undefined for indexed store instructions but this form is
not invalid. Other PPC variants confirming to recent ISA where this
bit may be reserved should ignore reserved bits and not raise invalid
instruction exception. In particular, MorphOS has an stwx instruction
with bit 31 set and fails to boot currently because of this. With this
patch it gets further.

---
On sam460ex MorhpOS still has problems accessing PCI devices so cannot
yet boot but does not hit the invalid instruction exception and gets
further and fails due to not finding boot volume or display controller.
On mac99 it actually boots but needs an OpenBIOS patch to get USB
working (needed for mouse and keyboard). I'll prepare some docs on how
to run different guests but for the impatient here's a little hint:
-M mac99 -m 512 -vga none -device sm501 \
-prom-env 'boot-device=cd:,\mac_ppc32\boot.img'

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
 target/ppc/translate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 3a215a1..525d55e 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -6886,7 +6886,7 @@ GEN_HANDLER(stop##u, opc, 0xFF, 0xFF, 0x00000000, type),
 #define GEN_STUX(name, stop, opc2, opc3, type)                                \
 GEN_HANDLER(name##ux, 0x1F, opc2, opc3, 0x00000001, type),
 #define GEN_STX_E(name, stop, opc2, opc3, type, type2, chk)                   \
-GEN_HANDLER_E(name##x, 0x1F, opc2, opc3, 0x00000001, type, type2),
+GEN_HANDLER_E(name##x, 0x1F, opc2, opc3, 0x00000000, type, type2),
 #define GEN_STS(name, stop, op, type)                                         \
 GEN_ST(name, stop, op | 0x20, type)                                           \
 GEN_STU(name, stop, op | 0x21, type)                                          \
-- 
2.7.6


Re: [Qemu-devel] [Qemu-ppc] [PATCH v6 5/5] target/ppc: Relax reserved bitmask of indexed store instructions
Posted by David Gibson 7 years, 7 months ago
On Fri, Jun 29, 2018 at 12:38:33AM +0200, BALATON Zoltan wrote:
> The PPC440 User Manual says that if bit 31 is set, the contents of
> CR[CR0] are undefined for indexed store instructions but this form is
> not invalid. Other PPC variants confirming to recent ISA where this
> bit may be reserved should ignore reserved bits and not raise invalid
> instruction exception. In particular, MorphOS has an stwx instruction
> with bit 31 set and fails to boot currently because of this. With this
> patch it gets further.
> 
> ---
> On sam460ex MorhpOS still has problems accessing PCI devices so cannot
> yet boot but does not hit the invalid instruction exception and gets
> further and fails due to not finding boot volume or display controller.
> On mac99 it actually boots but needs an OpenBIOS patch to get USB
> working (needed for mouse and keyboard). I'll prepare some docs on how
> to run different guests but for the impatient here's a little hint:
> -M mac99 -m 512 -vga none -device sm501 \
> -prom-env 'boot-device=cd:,\mac_ppc32\boot.img'
> 
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>

Applied to ppc-for-3.0, thanks.

> ---
>  target/ppc/translate.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index 3a215a1..525d55e 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -6886,7 +6886,7 @@ GEN_HANDLER(stop##u, opc, 0xFF, 0xFF, 0x00000000, type),
>  #define GEN_STUX(name, stop, opc2, opc3, type)                                \
>  GEN_HANDLER(name##ux, 0x1F, opc2, opc3, 0x00000001, type),
>  #define GEN_STX_E(name, stop, opc2, opc3, type, type2, chk)                   \
> -GEN_HANDLER_E(name##x, 0x1F, opc2, opc3, 0x00000001, type, type2),
> +GEN_HANDLER_E(name##x, 0x1F, opc2, opc3, 0x00000000, type, type2),
>  #define GEN_STS(name, stop, op, type)                                         \
>  GEN_ST(name, stop, op | 0x20, type)                                           \
>  GEN_STU(name, stop, op | 0x21, type)                                          \

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson