> |
Hi Pankaj,
> -----Original Message-----
> From: Pankaj Gupta <pankaj.gupta.linux@gmail.com>
> Sent: Wednesday, February 24, 2021 2:19 AM
> To: Moger, Babu <Babu.Moger@amd.com>
> Cc: Paolo Bonzini <pbonzini@redhat.com>; richard.henderson@linaro.org;
> Eduardo Habkost <ehabkost@redhat.com>; Qemu Developers <qemu-
> devel@nongnu.org>
> Subject: Re: [PATCH v2] i386: Add the support for AMD EPYC 3rd generation
> processors
>
> Hi Babu,
>
> > >> + .features[FEAT_8000_0008_EBX] =
> > >> + CPUID_8000_0008_EBX_CLZERO |
> CPUID_8000_0008_EBX_XSAVEERPTR |
> > >> + CPUID_8000_0008_EBX_WBNOINVD |
> CPUID_8000_0008_EBX_IBPB |
> > >> + CPUID_8000_0008_EBX_IBRS | CPUID_8000_0008_EBX_STIBP |
> > >> + CPUID_8000_0008_EBX_AMD_SSBD,
> > >
> > > Don't have SSBD flag exposed in default EPYC-Rome CPU configuration?
> > > Is there any reason for this?
> > > Or do we need to explicitly add it?
> >
> > I think we missed it when we added EPYC-Rome model. I was going to add
> > it sometime soon. As you know users can still add it with "+ssbd" if required.
>
> Thanks for clarifying. I also see CPUID_8000_0008_EBX_IBRS missing for Rome.
> Will it be okay if we add them now for Rome?
It is normally added as v2 for compatibility. Like this.
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 24db7ed892..f721d0db78 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -4179,6 +4179,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
.xlevel = 0x8000001E,
.model_id = "AMD EPYC-Rome Processor",
.cache_info = &epyc_rome_cache_info,
+ .versions = (X86CPUVersionDefinition[]) {
+ { .version = 1 },
+ {
+ .version = 2,
+ .props = (PropValue[]) {
+ { "ibrs", "on" },
+ { "amd-ssbd", "on" },
+ { "model-id",
+ "AMD EPYC-Rome Processor" },
+ { /* end of list */ }
+ }
+ },
+ { /* end of list */ }
+ }
},
{
.name = "EPYC-Milan",
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c index
> 6a53446e6a..b495116545 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -4161,7 +4161,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
> .features[FEAT_8000_0008_EBX] =
> CPUID_8000_0008_EBX_CLZERO | CPUID_8000_0008_EBX_XSAVEERPTR
> |
> CPUID_8000_0008_EBX_WBNOINVD | CPUID_8000_0008_EBX_IBPB |
> - CPUID_8000_0008_EBX_STIBP,
> + CPUID_8000_0008_EBX_STIBP | CPUID_8000_0008_EBX_IBRS |
> + CPUID_8000_0008_EBX_AMD_SSBD,
> .features[FEAT_7_0_EBX] =
> CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
> CPUID_7_0_EBX_AVX2 |
> CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 |
> CPUID_7_0_EBX_RDSEED |
Patchew URL: https://patchew.org/QEMU/cd9a84a3-f151-fa00-0b34-2652824bbbfc@amd.com/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: cd9a84a3-f151-fa00-0b34-2652824bbbfc@amd.com Subject: RE: [PATCH v2] i386: Add the support for AMD EPYC 3rd generation processors === TEST SCRIPT BEGIN === #!/bin/bash git rev-parse base > /dev/null || exit 0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu - [tag update] patchew/20210219153348.41861-1-mreitz@redhat.com -> patchew/20210219153348.41861-1-mreitz@redhat.com - [tag update] patchew/20210222141514.2646278-1-f4bug@amsat.org -> patchew/20210222141514.2646278-1-f4bug@amsat.org - [tag update] patchew/20210223225250.23945-1-vgoyal@redhat.com -> patchew/20210223225250.23945-1-vgoyal@redhat.com - [tag update] patchew/20210224131142.1952027-1-berrange@redhat.com -> patchew/20210224131142.1952027-1-berrange@redhat.com - [tag update] patchew/20210224135255.253837-1-kwolf@redhat.com -> patchew/20210224135255.253837-1-kwolf@redhat.com * [new tag] patchew/cd9a84a3-f151-fa00-0b34-2652824bbbfc@amd.com -> patchew/cd9a84a3-f151-fa00-0b34-2652824bbbfc@amd.com Switched to a new branch 'test' 982be90 i386: Add the support for AMD EPYC 3rd generation processors === OUTPUT BEGIN === ERROR: Missing Signed-off-by: line(s) total: 1 errors, 0 warnings, 20 lines checked Commit 982be908c3d2 (i386: Add the support for AMD EPYC 3rd generation processors) has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/cd9a84a3-f151-fa00-0b34-2652824bbbfc@amd.com/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [https://patchew.org/]. Please send your feedback to patchew-devel@redhat.com
> It is normally added as v2 for compatibility. Like this.
o.k. Thanks!
I will test this tomorrow.
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 24db7ed892..f721d0db78 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -4179,6 +4179,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
> .xlevel = 0x8000001E,
> .model_id = "AMD EPYC-Rome Processor",
> .cache_info = &epyc_rome_cache_info,
> + .versions = (X86CPUVersionDefinition[]) {
> + { .version = 1 },
> + {
> + .version = 2,
> + .props = (PropValue[]) {
> + { "ibrs", "on" },
> + { "amd-ssbd", "on" },
> + { "model-id",
> + "AMD EPYC-Rome Processor" },
> + { /* end of list */ }
> + }
> + },
> + { /* end of list */ }
> + }
> },
> {
> .name = "EPYC-Milan",
Hi Babu,
I tried to test below patch for AMD EPYC Rome CPU and I got below error [1]:
Also, I noticed SSBD CPU flag for guest was still available even
without this patch,
I noticed that for the guest, AMD_SSBD not got set.
Guest:
0x80000008 0x00: eax=0x00003028 ebx=0x00009205 ecx=0x00002003 edx=0x00000000
[1]
[ 0.008000] unchecked MSR access error: WRMSR to 0x48 (tried to
write 0x0000000000000000) at rIP: 0xffffffff9245c9e4
(native_write_msr+0x4/0x20)
[ 0.008000] [<ffffffff9243a6c5>] ? x86_spec_ctrl_setup_ap+0x35/0x50
[ 0.008000] [<ffffffff92439423>] ? identify_secondary_cpu+0x53/0x80
[ 0.008000] [<ffffffff9244adfa>] ? start_secondary+0x6a/0x1b0
0.011970] unchecked MSR access error: RDMSR from 0x48 at rIP:
0xffffffff9245c772 (native_read_msr+0x2/0x40)
Thanks,
Pankaj
> > It is normally added as v2 for compatibility. Like this.
>
> o.k. Thanks!
> I will test this tomorrow.
>
> >
> > diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> > index 24db7ed892..f721d0db78 100644
> > --- a/target/i386/cpu.c
> > +++ b/target/i386/cpu.c
> > @@ -4179,6 +4179,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
> > .xlevel = 0x8000001E,
> > .model_id = "AMD EPYC-Rome Processor",
> > .cache_info = &epyc_rome_cache_info,
> > + .versions = (X86CPUVersionDefinition[]) {
> > + { .version = 1 },
> > + {
> > + .version = 2,
> > + .props = (PropValue[]) {
> > + { "ibrs", "on" },
> > + { "amd-ssbd", "on" },
> > + { "model-id",
> > + "AMD EPYC-Rome Processor" },
> > + { /* end of list */ }
> > + }
> > + },
> > + { /* end of list */ }
> > + }
> > },
> > {
> > .name = "EPYC-Milan",
Pankaj,
> -----Original Message-----
> From: Pankaj Gupta <pankaj.gupta@cloud.ionos.com>
> Sent: Monday, March 1, 2021 10:46 AM
> To: Pankaj Gupta <pankaj.gupta.linux@gmail.com>
> Cc: Moger, Babu <Babu.Moger@amd.com>; Paolo Bonzini
> <pbonzini@redhat.com>; richard.henderson@linaro.org; Eduardo Habkost
> <ehabkost@redhat.com>; Qemu Developers <qemu-devel@nongnu.org>
> Subject: Re: [PATCH v2] i386: Add the support for AMD EPYC 3rd generation
> processors
>
> Hi Babu,
>
> I tried to test below patch for AMD EPYC Rome CPU and I got below error [1]:
>
> Also, I noticed SSBD CPU flag for guest was still available even without this
> patch, I noticed that for the guest, AMD_SSBD not got set.
>
> Guest:
> 0x80000008 0x00: eax=0x00003028 ebx=0x00009205 ecx=0x00002003
> edx=0x00000000
>
> [1]
> [ 0.008000] unchecked MSR access error: WRMSR to 0x48 (tried to
> write 0x0000000000000000) at rIP: 0xffffffff9245c9e4
> (native_write_msr+0x4/0x20)
> [ 0.008000] [<ffffffff9243a6c5>] ? x86_spec_ctrl_setup_ap+0x35/0x50
> [ 0.008000] [<ffffffff92439423>] ? identify_secondary_cpu+0x53/0x80
> [ 0.008000] [<ffffffff9244adfa>] ? start_secondary+0x6a/0x1b0
>
> 0.011970] unchecked MSR access error: RDMSR from 0x48 at rIP:
> 0xffffffff9245c772 (native_read_msr+0x2/0x40)
I did not see any problem with these patches.
My guest setup.
# lscpu |grep -o ssbd
ssbd
[root@rome-vm ~]# uname -r
4.18.0-147.el8.x86_64
[root@rome-vm ~]# cat /etc/redhat-release
Red Hat Enterprise Linux release 8.1 (Ootpa)
# wrmsr 0x48 7
[root@rome-vm ~]# rdmsr 0x48
7
My host os.
# uname -r
4.18.0-193.el8.x86_64
[root@rome images]# cat /etc/redhat-release
Red Hat Enterprise Linux release 8.2 Beta (Ootpa)
Also, I only see ssbd feature when add this patch(EPYC-Rome-v2).
Otherwise, I don’t see ssbd feature.
Thanks
Babu
>
> Thanks,
> Pankaj
>
> > > It is normally added as v2 for compatibility. Like this.
> >
> > o.k. Thanks!
> > I will test this tomorrow.
> >
> > >
> > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c index
> > > 24db7ed892..f721d0db78 100644
> > > --- a/target/i386/cpu.c
> > > +++ b/target/i386/cpu.c
> > > @@ -4179,6 +4179,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
> > > .xlevel = 0x8000001E,
> > > .model_id = "AMD EPYC-Rome Processor",
> > > .cache_info = &epyc_rome_cache_info,
> > > + .versions = (X86CPUVersionDefinition[]) {
> > > + { .version = 1 },
> > > + {
> > > + .version = 2,
> > > + .props = (PropValue[]) {
> > > + { "ibrs", "on" },
> > > + { "amd-ssbd", "on" },
> > > + { "model-id",
> > > + "AMD EPYC-Rome Processor" },
> > > + { /* end of list */ }
> > > + }
> > > + },
> > > + { /* end of list */ }
> > > + }
> > > },
> > > {
> > > .name = "EPYC-Milan",
> > Hi Babu,
> >
> > I tried to test below patch for AMD EPYC Rome CPU and I got below error [1]:
> >
> > Also, I noticed SSBD CPU flag for guest was still available even without this
> > patch, I noticed that for the guest, AMD_SSBD not got set.
> >
> > Guest:
> > 0x80000008 0x00: eax=0x00003028 ebx=0x00009205 ecx=0x00002003
> > edx=0x00000000
> >
> > [1]
> > [ 0.008000] unchecked MSR access error: WRMSR to 0x48 (tried to
> > write 0x0000000000000000) at rIP: 0xffffffff9245c9e4
> > (native_write_msr+0x4/0x20)
> > [ 0.008000] [<ffffffff9243a6c5>] ? x86_spec_ctrl_setup_ap+0x35/0x50
> > [ 0.008000] [<ffffffff92439423>] ? identify_secondary_cpu+0x53/0x80
> > [ 0.008000] [<ffffffff9244adfa>] ? start_secondary+0x6a/0x1b0
> >
> > 0.011970] unchecked MSR access error: RDMSR from 0x48 at rIP:
> > 0xffffffff9245c772 (native_read_msr+0x2/0x40)
>
> I did not see any problem with these patches.
> My guest setup.
> # lscpu |grep -o ssbd
> ssbd
> [root@rome-vm ~]# uname -r
> 4.18.0-147.el8.x86_64
> [root@rome-vm ~]# cat /etc/redhat-release
> Red Hat Enterprise Linux release 8.1 (Ootpa)
> # wrmsr 0x48 7
> [root@rome-vm ~]# rdmsr 0x48
> 7
>
>
> My host os.
> # uname -r
> 4.18.0-193.el8.x86_64
> [root@rome images]# cat /etc/redhat-release
> Red Hat Enterprise Linux release 8.2 Beta (Ootpa)
>
> Also, I only see ssbd feature when add this patch(EPYC-Rome-v2).
> Otherwise, I don’t see ssbd feature.
Thanks for checking!
Can you also see the ibrs feature inside guest with this patch?
Thanks,
Pankaj
>
> Thanks
> Babu
>
>
> >
> > Thanks,
> > Pankaj
> >
> > > > It is normally added as v2 for compatibility. Like this.
> > >
> > > o.k. Thanks!
> > > I will test this tomorrow.
> > >
> > > >
> > > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c index
> > > > 24db7ed892..f721d0db78 100644
> > > > --- a/target/i386/cpu.c
> > > > +++ b/target/i386/cpu.c
> > > > @@ -4179,6 +4179,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
> > > > .xlevel = 0x8000001E,
> > > > .model_id = "AMD EPYC-Rome Processor",
> > > > .cache_info = &epyc_rome_cache_info,
> > > > + .versions = (X86CPUVersionDefinition[]) {
> > > > + { .version = 1 },
> > > > + {
> > > > + .version = 2,
> > > > + .props = (PropValue[]) {
> > > > + { "ibrs", "on" },
> > > > + { "amd-ssbd", "on" },
> > > > + { "model-id",
> > > > + "AMD EPYC-Rome Processor" },
> > > > + { /* end of list */ }
> > > > + }
> > > > + },
> > > > + { /* end of list */ }
> > > > + }
> > > > },
> > > > {
> > > > .name = "EPYC-Milan",
> -----Original Message-----
> From: Pankaj Gupta <pankaj.gupta@cloud.ionos.com>
> Sent: Monday, March 1, 2021 2:22 PM
> To: Moger, Babu <Babu.Moger@amd.com>
> Cc: Pankaj Gupta <pankaj.gupta.linux@gmail.com>; Paolo Bonzini
> <pbonzini@redhat.com>; richard.henderson@linaro.org; Eduardo Habkost
> <ehabkost@redhat.com>; Qemu Developers <qemu-devel@nongnu.org>
> Subject: Re: [PATCH v2] i386: Add the support for AMD EPYC 3rd generation
> processors
>
> > > Hi Babu,
> > >
> > > I tried to test below patch for AMD EPYC Rome CPU and I got below error
> [1]:
> > >
> > > Also, I noticed SSBD CPU flag for guest was still available even
> > > without this patch, I noticed that for the guest, AMD_SSBD not got set.
> > >
> > > Guest:
> > > 0x80000008 0x00: eax=0x00003028 ebx=0x00009205 ecx=0x00002003
> > > edx=0x00000000
> > >
> > > [1]
> > > [ 0.008000] unchecked MSR access error: WRMSR to 0x48 (tried to
> > > write 0x0000000000000000) at rIP: 0xffffffff9245c9e4
> > > (native_write_msr+0x4/0x20)
> > > [ 0.008000] [<ffffffff9243a6c5>] ? x86_spec_ctrl_setup_ap+0x35/0x50
> > > [ 0.008000] [<ffffffff92439423>] ? identify_secondary_cpu+0x53/0x80
> > > [ 0.008000] [<ffffffff9244adfa>] ? start_secondary+0x6a/0x1b0
> > >
> > > 0.011970] unchecked MSR access error: RDMSR from 0x48 at rIP:
> > > 0xffffffff9245c772 (native_read_msr+0x2/0x40)
> >
> > I did not see any problem with these patches.
> > My guest setup.
> > # lscpu |grep -o ssbd
> > ssbd
> > [root@rome-vm ~]# uname -r
> > 4.18.0-147.el8.x86_64
> > [root@rome-vm ~]# cat /etc/redhat-release Red Hat Enterprise Linux
> > release 8.1 (Ootpa) # wrmsr 0x48 7 [root@rome-vm ~]# rdmsr 0x48
> > 7
> >
> >
> > My host os.
> > # uname -r
> > 4.18.0-193.el8.x86_64
> > [root@rome images]# cat /etc/redhat-release Red Hat Enterprise Linux
> > release 8.2 Beta (Ootpa)
> >
> > Also, I only see ssbd feature when add this patch(EPYC-Rome-v2).
> > Otherwise, I don’t see ssbd feature.
>
> Thanks for checking!
> Can you also see the ibrs feature inside guest with this patch?
Yes, The feature is available with this patch. Otherwise it is not available.
[root@rome-vm ~]# lscpu |grep -o ibrs
ibrs
>
> Thanks,
> Pankaj
> >
> > Thanks
> > Babu
> >
> >
> > >
> > > Thanks,
> > > Pankaj
> > >
> > > > > It is normally added as v2 for compatibility. Like this.
> > > >
> > > > o.k. Thanks!
> > > > I will test this tomorrow.
> > > >
> > > > >
> > > > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c index
> > > > > 24db7ed892..f721d0db78 100644
> > > > > --- a/target/i386/cpu.c
> > > > > +++ b/target/i386/cpu.c
> > > > > @@ -4179,6 +4179,20 @@ static X86CPUDefinition builtin_x86_defs[] =
> {
> > > > > .xlevel = 0x8000001E,
> > > > > .model_id = "AMD EPYC-Rome Processor",
> > > > > .cache_info = &epyc_rome_cache_info,
> > > > > + .versions = (X86CPUVersionDefinition[]) {
> > > > > + { .version = 1 },
> > > > > + {
> > > > > + .version = 2,
> > > > > + .props = (PropValue[]) {
> > > > > + { "ibrs", "on" },
> > > > > + { "amd-ssbd", "on" },
> > > > > + { "model-id",
> > > > > + "AMD EPYC-Rome Processor" },
> > > > > + { /* end of list */ }
> > > > > + }
> > > > > + },
> > > > > + { /* end of list */ }
> > > > > + }
> > > > > },
> > > > > {
> > > > > .name = "EPYC-Milan",
Hi Babu,
I confirm I can see both the ssbd & irbs features in guest with the
below patch. There was some issue at my end, Sorry! for the confusion.
Can you please post the official patch for inclusion.
Best regards,
Pankaj
On Mon, Mar 1, 2021 at 9:38 PM Babu Moger <babu.moger@amd.com> wrote:
>
>
>
> > -----Original Message-----
> > From: Pankaj Gupta <pankaj.gupta@cloud.ionos.com>
> > Sent: Monday, March 1, 2021 2:22 PM
> > To: Moger, Babu <Babu.Moger@amd.com>
> > Cc: Pankaj Gupta <pankaj.gupta.linux@gmail.com>; Paolo Bonzini
> > <pbonzini@redhat.com>; richard.henderson@linaro.org; Eduardo Habkost
> > <ehabkost@redhat.com>; Qemu Developers <qemu-devel@nongnu.org>
> > Subject: Re: [PATCH v2] i386: Add the support for AMD EPYC 3rd generation
> > processors
> >
> > > > Hi Babu,
> > > >
> > > > I tried to test below patch for AMD EPYC Rome CPU and I got below error
> > [1]:
> > > >
> > > > Also, I noticed SSBD CPU flag for guest was still available even
> > > > without this patch, I noticed that for the guest, AMD_SSBD not got set.
> > > >
> > > > Guest:
> > > > 0x80000008 0x00: eax=0x00003028 ebx=0x00009205 ecx=0x00002003
> > > > edx=0x00000000
> > > >
> > > > [1]
> > > > [ 0.008000] unchecked MSR access error: WRMSR to 0x48 (tried to
> > > > write 0x0000000000000000) at rIP: 0xffffffff9245c9e4
> > > > (native_write_msr+0x4/0x20)
> > > > [ 0.008000] [<ffffffff9243a6c5>] ? x86_spec_ctrl_setup_ap+0x35/0x50
> > > > [ 0.008000] [<ffffffff92439423>] ? identify_secondary_cpu+0x53/0x80
> > > > [ 0.008000] [<ffffffff9244adfa>] ? start_secondary+0x6a/0x1b0
> > > >
> > > > 0.011970] unchecked MSR access error: RDMSR from 0x48 at rIP:
> > > > 0xffffffff9245c772 (native_read_msr+0x2/0x40)
> > >
> > > I did not see any problem with these patches.
> > > My guest setup.
> > > # lscpu |grep -o ssbd
> > > ssbd
> > > [root@rome-vm ~]# uname -r
> > > 4.18.0-147.el8.x86_64
> > > [root@rome-vm ~]# cat /etc/redhat-release Red Hat Enterprise Linux
> > > release 8.1 (Ootpa) # wrmsr 0x48 7 [root@rome-vm ~]# rdmsr 0x48
> > > 7
> > >
> > >
> > > My host os.
> > > # uname -r
> > > 4.18.0-193.el8.x86_64
> > > [root@rome images]# cat /etc/redhat-release Red Hat Enterprise Linux
> > > release 8.2 Beta (Ootpa)
> > >
> > > Also, I only see ssbd feature when add this patch(EPYC-Rome-v2).
> > > Otherwise, I don’t see ssbd feature.
> >
> > Thanks for checking!
> > Can you also see the ibrs feature inside guest with this patch?
>
> Yes, The feature is available with this patch. Otherwise it is not available.
> [root@rome-vm ~]# lscpu |grep -o ibrs
> ibrs
>
> >
> > Thanks,
> > Pankaj
> > >
> > > Thanks
> > > Babu
> > >
> > >
> > > >
> > > > Thanks,
> > > > Pankaj
> > > >
> > > > > > It is normally added as v2 for compatibility. Like this.
> > > > >
> > > > > o.k. Thanks!
> > > > > I will test this tomorrow.
> > > > >
> > > > > >
> > > > > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c index
> > > > > > 24db7ed892..f721d0db78 100644
> > > > > > --- a/target/i386/cpu.c
> > > > > > +++ b/target/i386/cpu.c
> > > > > > @@ -4179,6 +4179,20 @@ static X86CPUDefinition builtin_x86_defs[] =
> > {
> > > > > > .xlevel = 0x8000001E,
> > > > > > .model_id = "AMD EPYC-Rome Processor",
> > > > > > .cache_info = &epyc_rome_cache_info,
> > > > > > + .versions = (X86CPUVersionDefinition[]) {
> > > > > > + { .version = 1 },
> > > > > > + {
> > > > > > + .version = 2,
> > > > > > + .props = (PropValue[]) {
> > > > > > + { "ibrs", "on" },
> > > > > > + { "amd-ssbd", "on" },
> > > > > > + { "model-id",
> > > > > > + "AMD EPYC-Rome Processor" },
> > > > > > + { /* end of list */ }
> > > > > > + }
> > > > > > + },
> > > > > > + { /* end of list */ }
> > > > > > + }
> > > > > > },
> > > > > > {
> > > > > > .name = "EPYC-Milan",
Pankaj, Sure.
I will add signoff from you if it is fine with you.
Signed-off-by: Pankaj Gupta <pankaj.gupta.linux@gmail.com>
Let me know.
Thanks
Babu
On 3/2/21 12:38 PM, Pankaj Gupta wrote:
> Hi Babu,
>
> I confirm I can see both the ssbd & irbs features in guest with the
> below patch. There was some issue at my end, Sorry! for the confusion.
> Can you please post the official patch for inclusion.
>
> Best regards,
> Pankaj
>
> On Mon, Mar 1, 2021 at 9:38 PM Babu Moger <babu.moger@amd.com> wrote:
>>
>>
>>
>>> -----Original Message-----
>>> From: Pankaj Gupta <pankaj.gupta@cloud.ionos.com>
>>> Sent: Monday, March 1, 2021 2:22 PM
>>> To: Moger, Babu <Babu.Moger@amd.com>
>>> Cc: Pankaj Gupta <pankaj.gupta.linux@gmail.com>; Paolo Bonzini
>>> <pbonzini@redhat.com>; richard.henderson@linaro.org; Eduardo Habkost
>>> <ehabkost@redhat.com>; Qemu Developers <qemu-devel@nongnu.org>
>>> Subject: Re: [PATCH v2] i386: Add the support for AMD EPYC 3rd generation
>>> processors
>>>
>>>>> Hi Babu,
>>>>>
>>>>> I tried to test below patch for AMD EPYC Rome CPU and I got below error
>>> [1]:
>>>>>
>>>>> Also, I noticed SSBD CPU flag for guest was still available even
>>>>> without this patch, I noticed that for the guest, AMD_SSBD not got set.
>>>>>
>>>>> Guest:
>>>>> 0x80000008 0x00: eax=0x00003028 ebx=0x00009205 ecx=0x00002003
>>>>> edx=0x00000000
>>>>>
>>>>> [1]
>>>>> [ 0.008000] unchecked MSR access error: WRMSR to 0x48 (tried to
>>>>> write 0x0000000000000000) at rIP: 0xffffffff9245c9e4
>>>>> (native_write_msr+0x4/0x20)
>>>>> [ 0.008000] [<ffffffff9243a6c5>] ? x86_spec_ctrl_setup_ap+0x35/0x50
>>>>> [ 0.008000] [<ffffffff92439423>] ? identify_secondary_cpu+0x53/0x80
>>>>> [ 0.008000] [<ffffffff9244adfa>] ? start_secondary+0x6a/0x1b0
>>>>>
>>>>> 0.011970] unchecked MSR access error: RDMSR from 0x48 at rIP:
>>>>> 0xffffffff9245c772 (native_read_msr+0x2/0x40)
>>>>
>>>> I did not see any problem with these patches.
>>>> My guest setup.
>>>> # lscpu |grep -o ssbd
>>>> ssbd
>>>> [root@rome-vm ~]# uname -r
>>>> 4.18.0-147.el8.x86_64
>>>> [root@rome-vm ~]# cat /etc/redhat-release Red Hat Enterprise Linux
>>>> release 8.1 (Ootpa) # wrmsr 0x48 7 [root@rome-vm ~]# rdmsr 0x48
>>>> 7
>>>>
>>>>
>>>> My host os.
>>>> # uname -r
>>>> 4.18.0-193.el8.x86_64
>>>> [root@rome images]# cat /etc/redhat-release Red Hat Enterprise Linux
>>>> release 8.2 Beta (Ootpa)
>>>>
>>>> Also, I only see ssbd feature when add this patch(EPYC-Rome-v2).
>>>> Otherwise, I don’t see ssbd feature.
>>>
>>> Thanks for checking!
>>> Can you also see the ibrs feature inside guest with this patch?
>>
>> Yes, The feature is available with this patch. Otherwise it is not available.
>> [root@rome-vm ~]# lscpu |grep -o ibrs
>> ibrs
>>
>>>
>>> Thanks,
>>> Pankaj
>>>>
>>>> Thanks
>>>> Babu
>>>>
>>>>
>>>>>
>>>>> Thanks,
>>>>> Pankaj
>>>>>
>>>>>>> It is normally added as v2 for compatibility. Like this.
>>>>>>
>>>>>> o.k. Thanks!
>>>>>> I will test this tomorrow.
>>>>>>
>>>>>>>
>>>>>>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c index
>>>>>>> 24db7ed892..f721d0db78 100644
>>>>>>> --- a/target/i386/cpu.c
>>>>>>> +++ b/target/i386/cpu.c
>>>>>>> @@ -4179,6 +4179,20 @@ static X86CPUDefinition builtin_x86_defs[] =
>>> {
>>>>>>> .xlevel = 0x8000001E,
>>>>>>> .model_id = "AMD EPYC-Rome Processor",
>>>>>>> .cache_info = &epyc_rome_cache_info,
>>>>>>> + .versions = (X86CPUVersionDefinition[]) {
>>>>>>> + { .version = 1 },
>>>>>>> + {
>>>>>>> + .version = 2,
>>>>>>> + .props = (PropValue[]) {
>>>>>>> + { "ibrs", "on" },
>>>>>>> + { "amd-ssbd", "on" },
>>>>>>> + { "model-id",
>>>>>>> + "AMD EPYC-Rome Processor" },
>>>>>>> + { /* end of list */ }
>>>>>>> + }
>>>>>>> + },
>>>>>>> + { /* end of list */ }
>>>>>>> + }
>>>>>>> },
>>>>>>> {
>>>>>>> .name = "EPYC-Milan",
> Pankaj, Sure. > > I will add signoff from you if it is fine with you. Sure. Thank you! > > Signed-off-by: Pankaj Gupta <pankaj.gupta.linux@gmail.com> Please use: Pankaj Gupta <pankaj.gupta@cloud.ionos.com > Thanks, Pankaj
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