RE: [RESEND PATCH 0/6] aspeed: Add AST1040 Caliptra mailbox support

Steven Lee posted 6 patches 1 month ago
Only 0 patches received!
RE: [RESEND PATCH 0/6] aspeed: Add AST1040 Caliptra mailbox support
Posted by Steven Lee 1 month ago
Hi,

Gentle ping for this patch series.
Any feedback would be appreciated.

Thanks,
Steven

> -----Original Message-----
> From: Steven Lee <steven_lee@aspeedtech.com>
> Sent: Wednesday, June 3, 2026 2:38 PM
> To: Cédric Le Goater <clg@kaod.org>; Peter Maydell
> <peter.maydell@linaro.org>; Steven Lee <steven_lee@aspeedtech.com>; Troy
> Lee <leetroy@gmail.com>; Jamin Lin <jamin_lin@aspeedtech.com>; Kane
> Chen <kane_chen@aspeedtech.com>; Andrew Jeffery
> <andrew@codeconstruct.com.au>; Joel Stanley <joel@jms.id.au>; Pierrick
> Bouvier <pierrick.bouvier@oss.qualcomm.com>; Fabiano Rosas
> <farosas@suse.de>; Laurent Vivier <lvivier@redhat.com>; Paolo Bonzini
> <pbonzini@redhat.com>; open list:All patches CC here
> <qemu-devel@nongnu.org>; open list:ASPEED BMCs
> <qemu-arm@nongnu.org>
> Cc: Troy Lee <troy_lee@aspeedtech.com>; longzl2@lenovo.com; Yunlin Tang
> <yunlin.tang@aspeedtech.com>
> Subject: [RESEND PATCH 0/6] aspeed: Add AST1040 Caliptra mailbox support
> 
> This series adds AST1040 Caliptra MCI mailbox support for the ast1040-evb
> machine.
> 
> AST1040 firmware accesses Caliptra through an MCI page aperture. This
> series adds an AST1040 SCU model with the CPTRA page-select registers, a
> mailbox frontend that exposes the Caliptra SRAM and CSR windows, and an
> optional external chardev peer so a Caliptra simulator can service EXECUTE
> requests.
> 
> The SoC wiring maps the mailbox SRAM, CSR window and 4 KiB remap
> aperture. The EVB machine also gets a cptra-peer option for linking the
> external peer after the machine is initialized.
> 
> The external peer backend is intended for co-simulation with an external
> Caliptra model. The current bring-up backend used for manual testing is
> caliptra-server:
> 
> 
> https://github.com/stevenlee7189/caliptra-server/blob/main-2.x/README.m
> d
> 
> That README includes the server command line, the matching QEMU
> command line, and the guest-side MFWV smoke test sequence used to
> validate the MCI aperture, LOCK/CMD/DLEN/EXECUTE flow, and
> FirmwareVersion response.
> The qtest added by this series does not depend on that repository; it uses a
> socket-backed test peer to validate the QEMU-side protocol and mailbox
> flow.
> 
> Resending because some reviewers did not receive the previous email.
> No changes since the prior posting.
> 
> Patch layout:
> - patches 1-2 add the AST1040 SCU model and mailbox frontend
> - patch 3 adds the external chardev peer backend
> - patch 4 wires the mailbox into the AST1040 SoC and EVB machine
> - patches 5-6 add qtest coverage and documentation
> 
> The qtest covers mailbox lock, execute and completion flow through a
> socket-backed peer, and verifies that SCU CPTRA_PAGE_REG0 remaps the
> MCI aperture between CSR and SRAM pages.
> 
> Validation:
> - scripts/checkpatch.pl --branch origin/master..HEAD
> - qtest coverage for the AST1040 mailbox execute path with a
>   socket-backed external peer
> - manual co-simulation bring-up with caliptra-server through
>   cptra-mbox-peer-extern
> 
> Steven Lee (6):
>   hw/misc/aspeed_scu: Add AST1040 SCU model
>   hw/misc: Add ASPEED Caliptra mailbox frontend
>   hw/misc: Add external Caliptra mailbox peer
>   hw/arm/aspeed_ast1040: Wire Caliptra mailbox
>   tests/qtest: Add ASPEED Caliptra mailbox test
>   docs/system/arm: Document AST1040 Caliptra mailbox
> 
>  MAINTAINERS                          |   1 +
>  docs/system/arm/aspeed.rst           |  32 +++
>  include/hw/arm/aspeed_soc.h          |  11 +
>  include/hw/misc/aspeed_cptra_mbox.h  | 133 ++++++++++
>  include/hw/misc/aspeed_scu.h         |  10 +
>  hw/arm/aspeed_ast1040.c              |  60 ++++-
>  hw/arm/aspeed_ast1040_evb.c          |  74 +++++-
>  hw/misc/aspeed_cptra_mbox.c          | 380
> +++++++++++++++++++++++++++
>  hw/misc/aspeed_scu.c                 | 251 ++++++++++++++++++
>  hw/misc/cptra_mbox_peer_extern.c     | 318 ++++++++++++++++++++++
>  tests/qtest/aspeed_cptra_mbox-test.c | 223 ++++++++++++++++
>  hw/misc/meson.build                  |   2 +
>  hw/misc/trace-events                 |   6 +
>  tests/qtest/meson.build              |   3 +-
>  14 files changed, 1498 insertions(+), 6 deletions(-)  create mode 100644
> include/hw/misc/aspeed_cptra_mbox.h
>  create mode 100644 hw/misc/aspeed_cptra_mbox.c  create mode 100644
> hw/misc/cptra_mbox_peer_extern.c  create mode 100644
> tests/qtest/aspeed_cptra_mbox-test.c
> 
> --
> 2.43.0