Hi Cédric

> Subject: Re: [PATCH v5 00/18] hw/usb/ehci: Add 64-bit descriptor addressing
> support
> 
> Jamin,
> 
> On 4/24/26 10:05, Jamin Lin wrote:
> > EHCI supports 64-bit addressing through the CTRLDSSEGMENT register,
> > which provides the upper 32 bits of descriptor addresses when the
> > controller advertises 64-bit capability.
> >
> > Currently QEMU EHCI model only partially supports this functionality
> > and descriptor addresses are effectively treated as 32-bit. This
> > becomes problematic on systems where system memory is located above
> > the 4GB boundary.
> >
> > The Linux EHCI driver enables 64-bit addressing if the controller
> > advertises the capability. During initialization it programs the
> > segment register to zero:
> >
> >
> > https://github.com/torvalds/linux/blob/master/drivers/usb/host/ehci-hc
> > d.c#L600
> >
> > The driver also notes that descriptor structures allocated from the
> > DMA pool use segment zero semantics. Descriptor memory is allocated
> > using the DMA API and platforms may configure a 64-bit DMA mask,
> > allowing descriptor memory to be placed above 4GB.
> >
> > On AST2700 platforms, system DRAM is mapped at 0x400000000. As a
> > result, descriptor addresses constructed directly from the EHCI
> > registers do not match the actual system addresses used by the
> > controller when accessing queue heads (QH) and queue element transfer
> > descriptors (qTD).
> >
> > This patch series implements full 64-bit descriptor addressing support
> > in the EHCI emulation. Descriptor address handling is updated to use
> > 64-bit values and the descriptor structures (QH, qTD, iTD and siTD)
> > are extended to support the upper address bits provided by the segment
> > register.
> >
> > Add a ctrldssegment-default property so platforms can provide a
> > descriptor address offset when constructing descriptor addresses.
> > This allows systems where DRAM resides above 4GB to access EHCI
> > descriptors correctly.
> >
> > The AST2700 machine uses this property to account for its DRAM mapping
> > at 0x400000000 and enables 64-bit EHCI DMA addressing.
> >
> > Test Result:
> > 1. EHCI 32bits with ast2600-evb machine Command line:
> > ./build/qemu-system-arm \
> >    -machine ast2600-evb \
> >    -m 1G \
> >    -drive file=image-bmc,if=mtd,format=raw \
> >    -nographic \
> >    -device usb-kbd,bus=usb-bus.1,id=mykbd \
> >    -drive id=usbdisk,if=none,file=image0.ext4,format=raw \
> >    -device usb-storage,bus=usb-bus.1,id=mystorage,drive=usbdisk
> >    -snapshot \
> >    -nographic
> > Result:
> > unable to initialize usb specBus 001 Device 001: ID 1d6b:0002 Linux
> > 6.18.3-v00.08.01-g172b7e27a30d ehci_hcd EHCI Host Controller Bus 001
> > Device 002: ID 0627:0001 QEMU QEMU USB Keyboard Bus 001 Device 003:
> ID
> > 46f4:0001 QEMU QEMU USB HARDDRIVE Bus 002 Device 001: ID 1d6b:0001
> > Linux 6.18.3-v00.08.01-g172b7e27a30d uhci_hcd Generic UHCI Host
> > Controller
> >
> > 2. EHCI 64bits with ast2700a2-evb machine Command line:
> > ./build/qemu-system-aarch64 -M ast2700a2-evb -nographic\
> >   -bios ast27x0_bootrom.bin \
> >   -drive file=image-bmc,format=raw,if=mtd \
> >   -snapshot \
> >   -device usb-kbd,bus=usb-bus.3,id=mykbd \
> >   -drive id=usbdisk,if=none,file=image0.ext4,format=raw \
> >   -device usb-storage,bus=usb-bus.3,id=mystorage,drive=usbdisk
> > Result:
> > root@ast2700-default:~# lsusb
> > unable to initialize usb specBus 001 Device 001: ID 1d6b:0001 Linux
> > 6.18.3-v00.08.01-g172b7e27a30d uhci_hcd Generic UHCI Host Controller
> > Bus 002 Device 001: ID 1d6b:0002 Linux 6.18.3-v00.08.01-g172b7e27a30d
> > ehci_hcd EHCI Host Controller Bus 002 Device 002: ID 0627:0001 QEMU
> > QEMU USB Keyboard Bus 002 Device 003: ID 46f4:0001 QEMU QEMU USB
> > HARDDRIVE
> >
> > v1
> >   1. Fix checkpatch coding style issues
> >   2. Implement 64-bit addressing for QH/qTD/iTD/siTD descriptors
> >   3. Add descriptor address offset property
> >   4. Enable 64-bit EHCI DMA addressing on AST2700
> >   5. Configure descriptor address offset for AST2700
> >
> > v2
> >   1. Remove unused EHCIfstn structure and dead code
> >   2. Replace fprintf(stderr, ...) with qemu_log_mask(LOG_GUEST_ERROR)
> >   3. Replace DPRINTF debug logs with trace events
> >   4. Add functional tests for USB EHCI on AST2600 and AST2700 A1/A2
> >   5. Fix review issue
> >
> > v3:
> >   1. Add Migration version test function
> >   2. Add EHCI 64-bit buffer pointer fields description in commit log
> >
> > v4:
> >   1. Reorder patches in the series
> >   2. Fix EHCI migration issues
> >   3. Introduce a common properties macro for both sysbus and PCI
> >   4. Drop the descriptor address offset property
> >   5. Add ctrldssegment-default property
> >   6. Address review comments
> >
> > v5:
> >   1. Add 11.0 machine compatibility properties
> >
> > Jamin Lin (18):
> >    tests/functional/arm/test_aspeed_ast2600_sdk: Add USB EHCI test for
> >      AST2600 SDK
> >    hw/usb/hcd-ehci: Remove unused EHCIfstn structure and dead code
> >    hw/usb/hcd-ehci.h: Fix coding style issues reported by checkpatch
> >    hw/usb/hcd-ehci.c: Fix coding style issues reported by checkpatch
> >    hw/usb/hcd-ehci.c: Replace fprintf(stderr, ...) with
> >      qemu_log_mask(LOG_GUEST_ERROR)
> >    hw/usb/hcd-ehci: Replace DPRINTF debug logs with trace events
> >    hw/usb/hcd-ehci: Introduce common properties macro for sysbus and pci
> >    hw/core: Add 11.0 machine compatibility properties
> >    hw/usb/hcd-ehci: Change descriptor addresses to 64-bit with migration
> >      compatibility
> >    hw/usb/hcd-ehci: Add property to advertise 64-bit addressing
> >      capability
> >    hw/usb/hcd-ehci: Implement 64-bit QH descriptor addressing
> >    hw/usb/hcd-ehci: Implement 64-bit qTD descriptor addressing
> >    hw/usb/hcd-ehci: Implement 64-bit iTD descriptor addressing
> >    hw/usb/hcd-ehci: Implement 64-bit siTD descriptor addressing
> >    hw/usb/hcd-ehci: Add ctrldssegment-default property
> >    hw/arm/aspeed_ast27x0: Set EHCI ctrldssegment-default
> >    hw/arm/aspeed_ast27x0: Enable 64-bit EHCI DMA addressing
> >    tests/functional/aarch64/test_aspeed_ast2700: Add USB EHCI test for
> >      AST2700 A1/A2
> >
> >   hw/usb/hcd-ehci.h                             |  64 +--
> >   include/hw/core/boards.h                      |   3 +
> >   include/hw/i386/pc.h                          |   3 +
> >   hw/arm/aspeed_ast27x0.c                       |   4 +
> >   hw/arm/virt.c                                 |   8 +
> >   hw/core/machine.c                             |   6 +
> >   hw/i386/pc.c                                  |   3 +
> >   hw/i386/pc_piix.c                             |  11 +-
> >   hw/i386/pc_q35.c                              |  11 +-
> >   hw/m68k/virt.c                                |   7 +
> >   hw/ppc/spapr.c                                |  13 +-
> >   hw/s390x/s390-virtio-ccw.c                    |  11 +
> >   hw/usb/hcd-ehci-pci.c                         |   2 +-
> >   hw/usb/hcd-ehci-sysbus.c                      |   2 +-
> >   hw/usb/hcd-ehci.c                             | 382
> +++++++++++-------
> >   hw/usb/trace-events                           |  25 +-
> >   .../aarch64/test_aspeed_ast2700a1.py          |   7 +
> >   .../aarch64/test_aspeed_ast2700a2.py          |   7 +
> >   .../functional/arm/test_aspeed_ast2600_sdk.py |   7 +
> >   19 files changed, 384 insertions(+), 192 deletions(-)
> >
> 
> Patches 1-9 are merged. Could you please resend the remaining patches in a
> v6 with the with suggested improvements ? I will queue the series in
> aspeed-next.
> 
Thanks for the review and suggestion.
Will resend v6.
Jamin
> 
> Thanks,
> 
> C.
>