docs/system/arm/aspeed.rst | 8 +- hw/arm/aspeed_ast27x0-ssp.c | 14 +-- hw/arm/aspeed_ast27x0-tsp.c | 14 +-- hw/arm/aspeed_ast27x0.c | 2 + hw/i2c/aspeed_i2c.c | 87 +++++++++++++------ .../functional/aarch64/test_aspeed_ast2700.py | 78 ++++++++++------- .../aarch64/test_aspeed_ast2700fc.py | 54 ++++++------ 7 files changed, 153 insertions(+), 104 deletions(-)
v1
1. Update test ASPEED SDK v11.00 for AST2700 A1
2. Fix DMA moving data into incorrect address for I2C
3. Fix EHCI3/4 IRQ routing to GIC
v2
1. Fix some extra 'From' info in the mail body
Jamin Lin (8):
hw/arm/aspeed_ast27x0: Fix EHCI3/4 IRQ routing to GIC
hw/arm/aspeed_ast27x0: Sort SSP and TSP memmap tables by address
hw/arm/aspeed_ast27x0: Sort SSP and TSP IRQ maps
hw/i2c/aspeed_i2c: Fix DMA moving data into incorrect address
tests/functional/aarch64/test_aspeed_ast2700: Enable PCIe2 DTS status
for AST2700 tests
tests/functional/aarch64/test_aspeed_ast2700: Update test ASPEED SDK
v11.00 for A1
tests/functional/aarch64/test_aspeed_ast2700fc: Update test ASPEED SDK
v11.00 for A1
docs/system/arm/aspeed: Load raw U-Boot image in AST2700 boot example
docs/system/arm/aspeed.rst | 8 +-
hw/arm/aspeed_ast27x0-ssp.c | 14 +--
hw/arm/aspeed_ast27x0-tsp.c | 14 +--
hw/arm/aspeed_ast27x0.c | 2 +
hw/i2c/aspeed_i2c.c | 87 +++++++++++++------
.../functional/aarch64/test_aspeed_ast2700.py | 78 ++++++++++-------
.../aarch64/test_aspeed_ast2700fc.py | 54 ++++++------
7 files changed, 153 insertions(+), 104 deletions(-)
--
2.43.0
On 2/3/26 02:55, Jamin Lin wrote: > v1 > 1. Update test ASPEED SDK v11.00 for AST2700 A1 > 2. Fix DMA moving data into incorrect address for I2C > 3. Fix EHCI3/4 IRQ routing to GIC > > v2 > 1. Fix some extra 'From' info in the mail body > > Jamin Lin (8): > hw/arm/aspeed_ast27x0: Fix EHCI3/4 IRQ routing to GIC > hw/arm/aspeed_ast27x0: Sort SSP and TSP memmap tables by address > hw/arm/aspeed_ast27x0: Sort SSP and TSP IRQ maps > hw/i2c/aspeed_i2c: Fix DMA moving data into incorrect address > tests/functional/aarch64/test_aspeed_ast2700: Enable PCIe2 DTS status > for AST2700 tests > tests/functional/aarch64/test_aspeed_ast2700: Update test ASPEED SDK > v11.00 for A1 > tests/functional/aarch64/test_aspeed_ast2700fc: Update test ASPEED SDK > v11.00 for A1 > docs/system/arm/aspeed: Load raw U-Boot image in AST2700 boot example > > docs/system/arm/aspeed.rst | 8 +- > hw/arm/aspeed_ast27x0-ssp.c | 14 +-- > hw/arm/aspeed_ast27x0-tsp.c | 14 +-- > hw/arm/aspeed_ast27x0.c | 2 + > hw/i2c/aspeed_i2c.c | 87 +++++++++++++------ > .../functional/aarch64/test_aspeed_ast2700.py | 78 ++++++++++------- > .../aarch64/test_aspeed_ast2700fc.py | 54 ++++++------ > 7 files changed, 153 insertions(+), 104 deletions(-) > For the series, Reviewed-by: Cédric Le Goater <clg@redhat.com> Thanks, C.
On 2/3/26 02:55, Jamin Lin wrote: > v1 > 1. Update test ASPEED SDK v11.00 for AST2700 A1 > 2. Fix DMA moving data into incorrect address for I2C > 3. Fix EHCI3/4 IRQ routing to GIC > > v2 > 1. Fix some extra 'From' info in the mail body > > Jamin Lin (8): > hw/arm/aspeed_ast27x0: Fix EHCI3/4 IRQ routing to GIC > hw/arm/aspeed_ast27x0: Sort SSP and TSP memmap tables by address > hw/arm/aspeed_ast27x0: Sort SSP and TSP IRQ maps > hw/i2c/aspeed_i2c: Fix DMA moving data into incorrect address > tests/functional/aarch64/test_aspeed_ast2700: Enable PCIe2 DTS status > for AST2700 tests > tests/functional/aarch64/test_aspeed_ast2700: Update test ASPEED SDK > v11.00 for A1 > tests/functional/aarch64/test_aspeed_ast2700fc: Update test ASPEED SDK > v11.00 for A1 > docs/system/arm/aspeed: Load raw U-Boot image in AST2700 boot example > > docs/system/arm/aspeed.rst | 8 +- > hw/arm/aspeed_ast27x0-ssp.c | 14 +-- > hw/arm/aspeed_ast27x0-tsp.c | 14 +-- > hw/arm/aspeed_ast27x0.c | 2 + > hw/i2c/aspeed_i2c.c | 87 +++++++++++++------ > .../functional/aarch64/test_aspeed_ast2700.py | 78 ++++++++++------- > .../aarch64/test_aspeed_ast2700fc.py | 54 ++++++------ > 7 files changed, 153 insertions(+), 104 deletions(-) > There are still threading issues but at least b4 works now. Thanks, C.
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