Hi Cédric

> Subject: Re: [PATCH v1 0/8] Update test ASPEED SDK v11.00 for AST2700 A1
> 
> On 2/2/26 07:19, Jamin Lin wrote:
> > From: Jamin Lin <jamin_lin@aspeedtech.com>
> >
> > v1
> >   1. Update test ASPEED SDK v11.00 for AST2700 A1
> >   2. Fix DMA moving data into incorrect address for I2C
> >   3. Fix EHCI3/4 IRQ routing to GIC
> >
> > Jamin Lin (8):
> >    hw/arm/aspeed_ast27x0: Fix EHCI3/4 IRQ routing to GIC
> >    hw/arm/aspeed_ast27x0: Sort SSP and TSP memmap tables by address
> >    hw/arm/aspeed_ast27x0: Sort SSP and TSP IRQ maps
> >    hw/i2c/aspeed_i2c: Fix DMA moving data into incorrect address
> >    tests/functional/aarch64/test_aspeed_ast2700: Enable PCIe2 DTS status
> >      for AST2700 tests
> >    tests/functional/aarch64/test_aspeed_ast2700: Update test ASPEED SDK
> >      v11.00 for A1
> >    tests/functional/aarch64/test_aspeed_ast2700fc: Update test ASPEED
> SDK
> >      v11.00 for A1
> >    docs/system/arm/aspeed: Load raw U-Boot image in AST2700 boot
> example
> >
> >   docs/system/arm/aspeed.rst                    |  8 +-
> >   hw/arm/aspeed_ast27x0-ssp.c                   | 14 +--
> >   hw/arm/aspeed_ast27x0-tsp.c                   | 14 +--
> >   hw/arm/aspeed_ast27x0.c                       |  2 +
> >   hw/i2c/aspeed_i2c.c                           | 87
> +++++++++++++------
> >   .../functional/aarch64/test_aspeed_ast2700.py | 78 ++++++++++-------
> >   .../aarch64/test_aspeed_ast2700fc.py          | 54 ++++++------
> >   7 files changed, 153 insertions(+), 104 deletions(-)
> >
> 
> Please resend the series in a threaded way.
> 
Our new solution is not able to send patches as a thread.
Therefore, I resent v2 using the previous approach.

[PATCH v2 0/8] Update test ASPEED SDK v11.00 for AST2700 A1 (RESEND)
https://patchew.org/QEMU/20260203020855.1642884-1-jamin._5Flin@aspeedtech.com/

Thanks-Jamin

> Thanks,
> 
> C.