Hi Cédric,

In the short term, there's no plan to release an image that includes the AST1700.
Once such an image becomes available, I'll submit a patch series for functional
testing.

I'll also try moving the AST1700 code to the hw/arm directory. If I encounter any
Issues during this process, I'll let you know.

Best regards,
Kane
> -----Original Message-----
> From: Cédric Le Goater <clg@kaod.org>
> Sent: Tuesday, November 11, 2025 12:44 AM
> To: Kane Chen <kane_chen@aspeedtech.com>; Peter Maydell
> <peter.maydell@linaro.org>; Steven Lee <steven_lee@aspeedtech.com>; Troy
> Lee <leetroy@gmail.com>; Jamin Lin <jamin_lin@aspeedtech.com>; Andrew
> Jeffery <andrew@codeconstruct.com.au>; Joel Stanley <joel@jms.id.au>;
> open list:ASPEED BMCs <qemu-arm@nongnu.org>; open list:All patches CC
> here <qemu-devel@nongnu.org>
> Cc: Troy Lee <troy_lee@aspeedtech.com>
> Subject: Re: [PATCH v2 00/17] hw/arm/aspeed: AST1700 LTPI support and
> device hookups
> 
> On 11/5/25 04:58, Kane Chen wrote:
> > From: Kane-Chen-AS <kane_chen@aspeedtech.com>
> >
> > Hi all,
> >
> > LTPI (LVDS Tunneling Protocol & Interface) is defined in the OCP
> > DC-SCM
> > 2.0 specification (see Figure 2):
> > https://www.opencompute.org/documents/ocp-dc-scm-2-0-ltpi-ver-1-0-pdf
> >
> > LTPI provides a protocol and physical interface for tunneling various
> > low-speed signals between the Host Processor Module (HPM) and the
> > Satellite Controller Module (SCM). In Figure 2 of the specification,
> > the AST27x0 SoC (left) integrates two LTPI controllers, allowing it to
> > connect to up to two AST1700 boards. On the other side, the AST1700
> > consolidates HPM FPGA functions and multiple peripheral interfaces
> > (GPIO, UART, I2C, I3C, etc.) onto a single board.
> >
> > Because the AST1700 exposes additional I/O interfaces (GPIO, I2C, I3C,
> > and others), it acts as an I/O expander. Once connected over LTPI, the
> > AST27x0 can control additional downstream devices through this link.
> >
> > This patch series introduces a basic LTPI controller model and wires
> > it into the AST27x0 SoC. It also adds the AST1700-specific LTPI
> > expander device and gradually connects common peripherals on the
> AST1700 model.
> > For blocks that are not yet functionally implemented (I3C, SGPIOM,
> > PWM), their MMIO regions are modeled as unimplemented devices to
> > reserve address space and make the missing functionality explicit,
> > ensuring that guest probing remains stable.
> 
> Thanks for the improved cover letter.
> 
> > In the official release images, the AST1700 functions are not included
> > by default. To test the AST1700-related functionality, please include
> > the following DTS files for probing:
> >
> https://github.com/AspeedTech-BMC/linux/blob/aspeed-master-v6.6/arch/a
> > rm64/boot/dts/aspeed/aspeed-ltpi0.dtsi
> >
> https://github.com/AspeedTech-BMC/linux/blob/aspeed-master-v6.6/arch/a
> > rm64/boot/dts/aspeed/aspeed-ltpi1.dtsi
> 
> Is a release planned ?
> 
> > After including these DTS files in the BMC image, you can verify LTPI
> > functionality using the following scenarios:
> >
> > 1. In U-Boot:
> >     Run the ltpi command to trigger the LTPI connection and display the
> >     current connection status.
> > 2. In BMC Linux:
> >     Run i2cdetect -y <16-38> to scan and test the I2C buses exposed by
> >     the AST1700.
> 
> because this would be good to have for functional tests.
> 
> >
> > Any feedback or suggestions are appreciated!
> 
> The AST1700 model is rather big and very similar to a SoC, without CPUs.
> Perhaps we should move the model under hw/arm instead ?
> 
> 
> Thanks,
> 
> C.
> 
> 
> >
> > Kane
> > ---
> >
> > ChangeLog
> > ---------
> > v2:
> > - Separate the AST1700 model into a standalone implementation
> > - Refine the mechanism for assigning the AST1700 board number
> >
> > v1:
> > - Initial version
> > ---
> >
> > Kane-Chen-AS (17):
> >    hw/arm/aspeed: Add LTPI controller
> >    hw/arm/aspeed: Attach LTPI controller to AST27X0 platform
> >    hw/arm/aspeed: Add AST1700 LTPI expander device model
> >    hw/arm/aspeed: Integrate AST1700 device into AST27X0
> >    hw/arm/aspeed: Integrate interrupt controller for AST1700
> >    hw/arm/aspeed: Attach LTPI controller to AST1700 model
> >    hw/arm/aspeed: Attach UART device to AST1700 model
> >    hw/arm/aspeed: Attach SRAM device to AST1700 model
> >    hw/arm/aspeed: Attach SPI device to AST1700 model
> >    hw/arm/aspeed: Attach ADC device to AST1700 model
> >    hw/arm/aspeed: Attach SCU device to AST1700 model
> >    hw/arm/aspeed: Attach GPIO device to AST1700 model
> >    hw/arm/aspeed: Attach I2C device to AST1700 model
> >    hw/arm/aspeed: Attach WDT device to AST1700 model
> >    hw/arm/aspeed: Model AST1700 I3C block as unimplemented device
> >    hw/arm/aspeed: Model AST1700 SGPIOM block as unimplemented
> device
> >    hw/arm/aspeed: Model AST1700 PWM block as unimplemented device
> >
> >   include/hw/arm/aspeed_soc.h      |  20 +-
> >   include/hw/intc/aspeed_intc.h    |   2 +
> >   include/hw/misc/aspeed_ast1700.h |  51 ++++++
> >   include/hw/misc/aspeed_ltpi.h    |  25 +++
> >   hw/arm/aspeed_ast27x0.c          | 154 ++++++++++++++--
> >   hw/intc/aspeed_intc.c            |  60 ++++++
> >   hw/misc/aspeed_ast1700.c         | 303
> +++++++++++++++++++++++++++++++
> >   hw/misc/aspeed_ltpi.c            |  98 ++++++++++
> >   hw/misc/meson.build              |   2 +
> >   9 files changed, 700 insertions(+), 15 deletions(-)
> >   create mode 100644 include/hw/misc/aspeed_ast1700.h
> >   create mode 100644 include/hw/misc/aspeed_ltpi.h
> >   create mode 100644 hw/misc/aspeed_ast1700.c
> >   create mode 100644 hw/misc/aspeed_ltpi.c
> >