> -----Original Message-----
> From: Cédric Le Goater <clg@kaod.org>
> Sent: Wednesday, February 7, 2024 12:48 AM
> To: Jamin Lin <jamin_lin@aspeedtech.com>; Peter Maydell
> <peter.maydell@linaro.org>; Andrew Jeffery <andrew@codeconstruct.com.au>;
> Joel Stanley <joel@jms.id.au>; open list:ASPEED BMCs
> <qemu-arm@nongnu.org>; open list:All patches CC here
> <qemu-devel@nongnu.org>
> Cc: Troy Lee <troy_lee@aspeedtech.com>
> Subject: Re: [v0 0/2] uart base and hardcode boot address 0
> 
> On 2/5/24 10:14, Jamin Lin wrote:
> > v0:
> 
> usually we start at v1, so the next version would be a v2. Indexing again :)
> 
Got it.
Thanks-Jamin
> 
> Thanks,
> 
> C.
> 
> 
> 
> > 1. support uart controller both 0 and 1 base 2. fix hardcode boot
> > address 0
> >
> > Jamin Lin (2):
> >    aspeed: support uart controller both 0 and 1 base
> >    aspeed: fix hardcode boot address 0
> >
> >   hw/arm/aspeed.c             | 12 ++++++++----
> >   hw/arm/aspeed_ast10x0.c     |  1 +
> >   hw/arm/aspeed_ast2400.c     |  2 ++
> >   hw/arm/aspeed_ast2600.c     |  1 +
> >   hw/arm/aspeed_soc_common.c  |  4 ++--
> >   include/hw/arm/aspeed_soc.h |  1 +
> >   6 files changed, 15 insertions(+), 6 deletions(-)
> >