RE: [PATCH v2 00/10] Support vbootrom for AST2700

Jamin Lin posted 10 patches 7 months ago
Only 0 patches received!
RE: [PATCH v2 00/10] Support vbootrom for AST2700
Posted by Jamin Lin 7 months ago
Hi Cedric, 

> Subject: Re: [PATCH v2 00/10] Support vbootrom for AST2700
> 
> Hello Jamin
> 
> On 4/10/25 04:38, Jamin Lin wrote:
> > v1:
> >    Add initial support for AST27x0
> >    The purpose of vbootrom here is to simulate the work of BootMCU SPL
> (riscv)
> >    in AST2700, because QEMU doesn't support heterogenous architecture
> yet.
> >
> >    ast27x0_bootrom.bin is a simplified, free (Apache 2.0) boot ROM for
> >    ASPEED AST27x0 BMC SOC. It currently implements the bare minimum
> to
> >    load, parse, initialize and run boot images stored in SPI flash, but may
> grow
> >    more features over time as needed. The source code is available at:
> >    https://github.com/google/vbootrom
> 
> I don't see any updates on the vbootrom github repo for Aspeed SoCs. Is the
> vbootrom compatible with the Nuvoton SoC ?
> 
I am upstreaming google/vbootrom to support AST27X0 and code changes in this
pull request,  https://github.com/google/vbootrom/pull/5

Thanks-Jamin

> 
> Thanks,
> 
> C.
> 
> 
> 
> 
> > v2:
> >    Add "Introduced ASPEED_DEV_VBOOTROM in the device enumeration"
> patch to fix
> >    build failed.
> >
> > Jamin Lin (10):
> >    hw/arm/aspeed: Introduced ASPEED_DEV_VBOOTROM in the device
> >      enumeration
> >    hw/arm/aspeed_ast27x0: Add "vbootrom_size" field to AspeedSoCClass
> >    hw/arm/aspeed_ast27x0: Rename variable sram_name to name in
> ast2700
> >      realize
> >    hw/arm/aspeed_ast27x0 Introduce vbootrom memory region
> >    hw/arm/aspeed: Enable vbootrom support by default on AST2700 EVB
> >      machines
> >    hw/arm/aspeed: Reuse rom_size variable for vbootrom setup
> >    hw/arm/aspeed: Add support for loading vbootrom image via "-bios"
> >    pc-bios: Add AST27x0 vBootrom
> >    tests/functional/aspeed: Update AST2700 functional test to use
> >      vbootrom
> >    docs/system/arm/aspeed: Support vbootrom for AST2700
> >
> >   MAINTAINERS                             |   1 +
> >   docs/system/arm/aspeed.rst              |  18 +++--------
> >   include/hw/arm/aspeed.h                 |   1 +
> >   include/hw/arm/aspeed_soc.h             |   3 ++
> >   hw/arm/aspeed.c                         |  37
> ++++++++++++++++++++++-
> >   hw/arm/aspeed_ast27x0.c                 |  20 ++++++++++---
> >   pc-bios/README                          |   6 ++++
> >   pc-bios/ast27x0_bootrom.bin             | Bin 0 -> 15464 bytes
> >   pc-bios/meson.build                     |   1 +
> >   tests/functional/test_aarch64_aspeed.py |  38 +-----------------------
> >   10 files changed, 69 insertions(+), 56 deletions(-)
> >   create mode 100644 pc-bios/ast27x0_bootrom.bin
> >

Re: [PATCH v2 00/10] Support vbootrom for AST2700
Posted by Cédric Le Goater 6 months, 4 weeks ago
Hello Jamin

On 4/14/25 03:20, Jamin Lin wrote:
> Hi Cedric,
> 
>> Subject: Re: [PATCH v2 00/10] Support vbootrom for AST2700
>>
>> Hello Jamin
>>
>> On 4/10/25 04:38, Jamin Lin wrote:
>>> v1:
>>>     Add initial support for AST27x0
>>>     The purpose of vbootrom here is to simulate the work of BootMCU SPL
>> (riscv)
>>>     in AST2700, because QEMU doesn't support heterogenous architecture
>> yet.
>>>
>>>     ast27x0_bootrom.bin is a simplified, free (Apache 2.0) boot ROM for
>>>     ASPEED AST27x0 BMC SOC. It currently implements the bare minimum
>> to
>>>     load, parse, initialize and run boot images stored in SPI flash, but may
>> grow
>>>     more features over time as needed. The source code is available at:
>>>     https://github.com/google/vbootrom
>>
>> I don't see any updates on the vbootrom github repo for Aspeed SoCs. Is the
>> vbootrom compatible with the Nuvoton SoC ?
>>
> I am upstreaming google/vbootrom to support AST27X0 and code changes in this
> pull request,  https://github.com/google/vbootrom/pull/5

Nice !

This vbootrom proposal should be merged before accepting the changes
in QEMU though. The vbootrom PR has been approved, it lacks an Aspeed
CLA AFAICT. So this seems feasible for the QEMU 10.1 cycle.

Thanks,

C.