include/hw/pci-host/aspeed_pcie.h | 8 +++++++ hw/pci-host/aspeed_pcie.c | 35 ++++++++++++++++++++++++++++++- 2 files changed, 42 insertions(+), 1 deletion(-)
Hi Cédric
> Cc: Troy Lee <troy_lee@aspeedtech.com>; nabihestefan@google.com;
> wuhaotsh@google.com; titusr@google.com
> Subject: RE: [SPAM] [PATCH v1 00/11] Support PCIe RC to AST2600 and
> AST2700
>
> Hi Cédric
>
> > Subject: Re: [SPAM] [PATCH v1 00/11] Support PCIe RC to AST2600 and
> > AST2700
> >
> > Hello Jamin,
> >
> > On 8/19/25 11:01, Jamin Lin wrote:
> > > v1:
> > > 1. Add PCIe PHY, CFG, and MMIO window support for AST2600.
> > > Note: Only supports RC_H.
> > > 2. Add PCIe PHY, CFG, and MMIO window support for AST2700.
> > > Note: Supports 3 RCs.
> > >
> > > Testing PCIe RC model with e1000e PCIe device model
> > >
> > > AST2600
> > >
> > > The AST2600/ASPEED PCIe driver treats root bus 0x80 specially:
> > > Only two device addresses are usable on the root bus:
> > > addr 0: ASPEED host bridge
> > > addr 8: usable for attaching a PCIe root port
> > >
> > > To attach endpoints without driver changes, the test places a QEMU
> > > PCIe root port at 0x80:08.0 and attaches an e1000e NIC behind it.
> > > The endpoint then enumerates on bus 0x81.
> > >
> > > QEMU command line additions
> > > -device pcie-root-port,id=root_port0,slot=1,addr=8,bus=pcie.0
> > > -device e1000e,netdev=net0,bus=root_port0 -netdev user,id=net0
> > >
> > > Verification with lspci:
> > > 0001:80:00.0 Host bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI
> > > Bridge
> > > 0001:80:08.0 PCI bridge: Red Hat, Inc. QEMU PCIe Root port
> > > 0001:81:00.0 Ethernet controller: Intel Corporation 82574L Gigabit
> > > Network Connection
> > >
> > > This is a temporary solution that allows attaching multiple PCIe
> > > devices while the ASPEED drivers does not support placing endpoints
> > > directly on bus numbers 0x80.
> >
> > Could we try to model the real HW topology ? On an ast2600a3 EVB with
> > a PCI serial adapter plugged in the available slot :
> >
> > root@ast2600-default:~# lspci
> > 80:00.0 Host bridge: ASPEED Technology, Inc. Device 2600
> > 80:08.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI
> > Bridge (rev
> > 06)
> > 81:00.0 Serial controller: MosChip Semiconductor Technology Ltd.
> > MCS9922 PCIe Multi-I/O Controller
> > 81:00.1 Serial controller: MosChip Semiconductor Technology Ltd.
> > MCS9922 PCIe Multi-I/O Controller
> >
> > What is blocking us from modeling "Device 2600" ?
> >
> On real hardware, the AST2600 EVB shows two functions on bus 0x80:
>
> 0001:80:08.0 – AST1150 PCI-to-PCI Bridge PCI bridge: ASPEED Technology, Inc.
> AST1150 PCI-to-PCI Bridge (rev 06)
> Subsystem: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge
> Flags: bus master, fast devsel, latency 0, IRQ 81
> Bus: primary=80, secondary=81, subordinate=82 I/O behind bridge: 1000-1fff
> [size=4K] [16-bit] Memory behind bridge: 70000000-75ffffff [size=96M] [32-bit]
> Prefetchable memory behind bridge: [disabled] [64-bit]
> Capabilities: MSI, Power Management v3, Express Root Port, Virtual Channel,
> AER Kernel driver in use: pcieport
>
> 0001:80:00.0 – Host bridge (Device 2600) Host bridge: ASPEED Technology, Inc.
> Device 2600
> Subsystem: ASPEED Technology, Inc. Device 2600
> Flags: bus master, fast devsel, latency 0
>
> In contrast, on the AST2700 platform the enumeration starts directly at bus 0
> with the AST1150 bridge, and no separate “Device 2700” host bridge is visible:
>
> 0002:00:00.0 – AST1150 PCI-to-PCI Bridge PCI bridge: ASPEED Technology, Inc.
> AST1150 PCI-to-PCI Bridge (rev 10)
> Flags: bus master, fast devsel, latency 0, IRQ 43
> Bus: primary=00, secondary=01, subordinate=01 I/O behind bridge: [disabled]
> Memory behind bridge: [disabled] Prefetchable memory behind bridge:
> [disabled]
> Capabilities: Express Root Port, MSI, Power Management v3,
> Vendor Specific Information, L1 PM Substates, AER Kernel
> driver in use: pcieport
>
>
> What blocks me from modeling “Device 2600” today is mainly the "lack of a
> proper QEMU device model for the AST2600/AST2700 PCIe Host bridge".
> On AST2600, 80:00.0 is the host bridge and 80:08.0 is the downstream AST1150
> bridge. To reproduce this topology in QEMU, we would need to:
>
> 1. Implement a new QEMU device for the AST2600/AST2700 host bridge, with
> its own PCI config space and initialization.
> 2. Integrate this model with the ASPEED PCIe driver, which currently only
> supports endpoints appearing behind a bridge on bus 0x81 for AST2600 and
> 0x01 for AST2700, and does not allow attaching devices directly under bus
> 0x80 for AST2600 and 0x00 for AST2700.
>
> "Until such a host bridge model is introduced, the temporary workaround is to
> insert a generic QEMU pcie-root-port at 0x80:08.0." This allows endpoints to
> enumerate correctly, but it does not exactly match the EVB topology.
> Adding a dedicated AST2600 host bridge model is the next step if we want
> QEMU to reflect the hardware layout more faithfully, while keeping the
> AST2700 behavior (00:00.0 only) consistent.
>
> Thanks-Jamin
> >
> > Thanks,
> >
> > C.
> >
I’ve updated the model to instantiate a PCIe Root Port at 80:08 and keep the original PCIe Host Bridge at 80:00.
This now matches the real hardware topology. Thanks for the guidance—I’ll resend the patch.
I’ll also review AST2700 to see whether the same approach can be applied.
Thanks-Jamin
root@ast2600-default:~# lspci
80:00.0 Host bridge: ASPEED Technology, Inc. Device 2600
80:08.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge
81:00.0 Ethernet controller: Intel Corporation 82574L Gigabit Network Connection
root@ast2600-default:~# lspci -v
80:00.0 Host bridge: ASPEED Technology, Inc. Device 2600
Subsystem: Red Hat, Inc. Device 1100
Flags: bus master, fast devsel, latency 0
80:08.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge (prog-if 00 [Normal decode])
Subsystem: ASPEED Technology, Inc. Device 0000
Flags: bus master, fast devsel, latency 0, IRQ 81
Bus: primary=80, secondary=81, subordinate=81, sec-latency=0
I/O behind bridge: 1000-1fff [size=4K] [16-bit]
Memory behind bridge: 70000000-701fffff [size=2M] [32-bit]
Prefetchable memory behind bridge: 70200000-703fffff [size=2M] [32-bit]
Capabilities: [48] Express Root Port (Slot+), IntMsgNum 0
Capabilities: [40] Subsystem: ASPEED Technology, Inc. Device 0000
Capabilities: [100] Advanced Error Reporting
Kernel driver in use: pcieport
81:00.0 Ethernet controller: Intel Corporation 82574L Gigabit Network Connection
Subsystem: Intel Corporation Device 0000
Flags: bus master, fast devsel, latency 0, IRQ 81
Memory at 70040000 (32-bit, non-prefetchable) [size=128K]
Memory at 70060000 (32-bit, non-prefetchable) [size=128K]
I/O ports at 1000 [size=32]
Memory at 70080000 (32-bit, non-prefetchable) [size=16K]
Expansion ROM at 70000000 [disabled] [size=256K]
Capabilities: [c8] Power Management version 2
Capabilities: [d0] MSI: Enable- Count=1/1 Maskable- 64bit+
Capabilities: [e0] Express Endpoint, IntMsgNum 0
Capabilities: [a0] MSI-X: Enable+ Count=5 Masked-
Capabilities: [100] Advanced Error Reporting
Capabilities: [140] Device Serial Number 52-54-00-ff-ff-12-34-5a
Kernel driver in use: e1000e
dev: aspeed.pcie-rc, id ""
gpio-out "sysbus-irq" 1
bus-nr = 128 (0x80)
msi-addr = 511115356 (0x1e77005c)
dram-base = 2147483648 (0x80000000)
x-config-reg-migration-enabled = true
bypass-iommu = false
mmio ffffffffffffffff/0000000010000000
mmio ffffffffffffffff/ffffffffffffffff
mmio ffffffffffffffff/0000000000010000
bus: pcie.0
type PCIE
dev: aspeed.pcie-rp, id ""
power_controller_present = true
disable-acs = false
chassis = 0 (0x0)
slot = 0 (0x0)
hotplug = true
x-do-not-expose-native-hotplug-cap = false
port = 0 (0x0)
aer_log_max = 8 (0x8)
x-pci-express-writeable-slt-bug = false
addr = 08.0
romfile = ""
romsize = 4294967295 (0xffffffff)
rombar = -1 (0xffffffffffffffff)
multifunction = false
x-pcie-lnksta-dllla = true
x-pcie-extcap-init = true
failover_pair_id = ""
acpi-index = 0 (0x0)
x-pcie-err-unc-mask = true
x-pcie-ari-nextfn-1 = false
x-max-bounce-buffer-size = 4096 (4 KiB)
sriov-pf = ""
x-pcie-ext-tag = true
busnr = 0 (0x0)
class PCI bridge, addr 00:08.0, pci id 1a03:1150 (sub 0000:0000)
bus: pcie.1
type PCIE
dev: e1000e, id ""
mac = "52:54:00:12:34:5a"
netdev = "net0"
disable_vnet_hdr = 0 (0x0)
subsys_ven = 32902 (0x8086)
subsys = 0 (0x0)
init-vet = true
migrate-timadj = true
addr = 00.0
romfile = "efi-e1000e.rom"
romsize = 262144 (0x40000)
rombar = -1 (0xffffffffffffffff)
multifunction = false
x-pcie-lnksta-dllla = true
x-pcie-extcap-init = true
failover_pair_id = ""
acpi-index = 0 (0x0)
x-pcie-err-unc-mask = true
x-pcie-ari-nextfn-1 = false
x-max-bounce-buffer-size = 4096 (4 KiB)
sriov-pf = ""
x-pcie-ext-tag = true
busnr = 129 (0x81)
class Ethernet controller, addr 81:00.0, pci id 8086:10d3 (sub 8086:0000)
bar 0: mem at 0x70040000 [0x7005ffff]
bar 1: mem at 0x70060000 [0x7007ffff]
bar 2: i/o at 0x19000 [0x1901f]
bar 3: mem at 0x70080000 [0x70083fff]
bar 6: mem at 0xffffffffffffffff [0x3fffe]
dev: aspeed.pcie-root, id ""
addr = 00.0
romfile = ""
romsize = 4294967295 (0xffffffff)
rombar = -1 (0xffffffffffffffff)
multifunction = false
x-pcie-lnksta-dllla = true
x-pcie-extcap-init = true
failover_pair_id = ""
acpi-index = 0 (0x0)
x-pcie-err-unc-mask = true
x-pcie-ari-nextfn-1 = false
x-max-bounce-buffer-size = 4096 (4 KiB)
sriov-pf = ""
x-pcie-ext-tag = true
busnr = 0 (0x0)
class Host bridge, addr 00:00.0, pci id 1a03:2600 (sub 1af4:1100)
Command:
pcie.0: root bus
pcie.1: root port bus
-device e1000e,netdev=net0,bus=pcie.1
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Change-Id: Ia89363ede1b629928447f35ce148d5c28b96b79f
---
include/hw/pci-host/aspeed_pcie.h | 8 +++++++
hw/pci-host/aspeed_pcie.c | 35 ++++++++++++++++++++++++++++++-
2 files changed, 42 insertions(+), 1 deletion(-)
diff --git a/include/hw/pci-host/aspeed_pcie.h b/include/hw/pci-host/aspeed_pcie.h
index ba74536a37..1569a3c774 100644
--- a/include/hw/pci-host/aspeed_pcie.h
+++ b/include/hw/pci-host/aspeed_pcie.h
@@ -44,6 +44,14 @@ typedef struct AspeedPCIERegMap {
AspeedPCIERcRegs rc;
} AspeedPCIERegMap;
+#define TYPE_ASPEED_PCIE_RP "aspeed.pcie-rp"
+
+typedef struct AspeedPCIERPState {
+ PCIDevice parent_obj;
+} AspeedPCIERPState;
+
+OBJECT_DECLARE_SIMPLE_TYPE(AspeedPCIERPState, ASPEED_PCIE_RP)
+
#define TYPE_ASPEED_PCIE_ROOT "aspeed.pcie-root"
OBJECT_DECLARE_SIMPLE_TYPE(AspeedPCIERootState, ASPEED_PCIE_ROOT);
diff --git a/hw/pci-host/aspeed_pcie.c b/hw/pci-host/aspeed_pcie.c
index 6b786f358a..b341f82b38 100644
--- a/hw/pci-host/aspeed_pcie.c
+++ b/hw/pci-host/aspeed_pcie.c
@@ -23,10 +23,39 @@
#include "hw/registerfields.h"
#include "hw/irq.h"
#include "hw/pci/pci_host.h"
+#include "hw/pci/pcie_port.h"
#include "hw/pci-host/aspeed_pcie.h"
#include "hw/pci/msi.h"
#include "trace.h"
+/*
+ * PCIe Root Port
+ */
+
+static void aspeed_pcie_rp_class_init(ObjectClass *klass, const void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ PCIERootPortClass *rpc = PCIE_ROOT_PORT_CLASS(klass);
+
+ dc->desc = "ASPEED AST1150 PCIe Root Port";
+ set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
+
+ k->vendor_id = PCI_VENDOR_ID_ASPEED;
+ k->device_id = 0x1150;
+ dc->user_creatable = true;
+
+ rpc->exp_offset = 0x48;
+ rpc->aer_offset = 0x100;
+}
+
+static const TypeInfo aspeed_pcie_rp_info = {
+ .name = TYPE_ASPEED_PCIE_RP,
+ .parent = TYPE_PCIE_ROOT_PORT,
+ .class_init = aspeed_pcie_rp_class_init,
+ .interfaces = (InterfaceInfo[]) { { INTERFACE_PCIE_DEVICE }, { 0 } },
+};
+
/*
* PCIe Root
*/
@@ -39,7 +68,7 @@ static void aspeed_pcie_root_class_init(ObjectClass *klass, const void *data)
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
dc->desc = "ASPEED PCIe Host Bridge";
k->vendor_id = PCI_VENDOR_ID_ASPEED;
- k->device_id = 0x1150;
+ k->device_id = 0x2600;
k->class_id = PCI_CLASS_BRIDGE_HOST;
k->revision = 0;
@@ -224,6 +253,9 @@ static void aspeed_pcie_rc_realize(DeviceState *dev, Error **errp)
pci_setup_iommu(pci->bus, &aspeed_pcie_rc_iommu_ops, rc);
qdev_realize(DEVICE(&rc->root), BUS(pci->bus), &error_fatal);
+
+ PCIDevice *rp = pci_new(PCI_DEVFN(8, 0), TYPE_ASPEED_PCIE_RP);
+ pci_realize_and_unref(rp, pci->bus, errp);
}
static const char *aspeed_pcie_rc_root_bus_path(PCIHostState *host_bridge,
@@ -943,6 +975,7 @@ static const TypeInfo aspeed_2700_pcie_phy_info = {
static void aspeed_pcie_register_types(void)
{
+ type_register_static(&aspeed_pcie_rp_info);
type_register_static(&aspeed_pcie_root_info);
type_register_static(&aspeed_pcie_rc_info);
type_register_static(&aspeed_pcie_cfg_info);
--
2.43.0
> >
> >
> >
> >
> > > Reference:
> > > https://github.com/AspeedTech-BMC/linux/blob/aspeed-master-v6.6/driv
> > > er
> > > s/pci/controller/pcie-aspeed.c#L309
> > >
> > > Test Image: ASPEED SDK v09.07. It okay to use ASPEED SDK v09.06.
> > >
> >
> https://github.com/AspeedTech-BMC/openbmc/releases/download/v09.07/ast
> > > 2600-default-obmc.tar.gz
> > >
> > > The e1000e driver is built into this image.
> > > After booting, users should see the e1000e Ethernet interface.
> > > With this setup, RC_H on AST2600 can be tested using e1000e
> > > endpoints in
> > QEMU.
> > >
> > > Example system output:
> > > root@ast2600-default:~# lspci
> > > 80:00.0 Host bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI
> > > Bridge
> > > 80:08.0 PCI bridge: Red Hat, Inc. QEMU PCIe Root port
> > > 81:00.0 Ethernet controller: Intel Corporation 82574L Gigabit
> > > Network Connection root@ast2600-default:~# ifconfig eth4
> > > eth4 Link encap:Ethernet HWaddr 52:54:00:12:34:5A
> > > inet addr:169.254.160.167 Bcast:169.254.255.255
> > Mask:255.255.0.0
> > > inet6 addr: fe80::5054:ff:fe12:345a/64 Scope:Link
> > > UP BROADCAST RUNNING MULTICAST MTU:1500
> Metric:1
> > > RX packets:19 errors:0 dropped:0 overruns:0 frame:0
> > > TX packets:54 errors:0 dropped:0 overruns:0 carrier:0
> > > collisions:0 txqueuelen:1000
> > > RX bytes:4896 (4.7 KiB) TX bytes:8079 (7.8 KiB)
> > > Interrupt:81 Memory:70040000-70060000
> > >
> > > root@ast2600-default:~# dmesg | grep "e1000e"
> > > [ 2.901955] e1000e: Intel(R) PRO/1000 Network Driver
> > > [ 2.902346] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
> > > [ 15.366727] e1000e 0000:81:00.0: Interrupt Throttling Rate (ints/sec)
> set
> > to dynamic conservative mode
> > > [ 15.431884] e1000e 0000:81:00.0 0000:81:00.0 (uninitialized):
> registered
> > PHC clock
> > > [ 15.508477] e1000e 0000:81:00.0 eth4: (PCI Express:2.5GT/s:Width x1)
> > 52:54:00:12:34:5a
> > > [ 15.509301] e1000e 0000:81:00.0 eth4: Intel(R) PRO/1000 Network
> > Connection
> > > [ 15.510768] e1000e 0000:81:00.0 eth4: MAC: 3, PHY: 8, PBA No:
> > 000000-000
> > > [ 49.781217] e1000e 0000:81:00.0 eth4: NIC Link is Up 1000 Mbps Full
> > Duplex, Flow Control: Rx/Tx
> > >
> > >
> > > AST2700:
> > >
> > > The ASPEED PCIe driver only supports bus 0 with a single device at
> > > slot 0, which is reserved for the internal bridge. All endpoint
> > > devices must therefore reside on bus 1 to be discovered.
> > > See the ASPEED PCIe driver implementation here:
> > > https://github.com/AspeedTech-BMC/linux/blob/aspeed-master-v6.6/driv
> > > er
> > > s/pci/controller/pcie-aspeed.c#L512
> > >
> > > By default, the ASPEED SDK enables only PCIe RC2, so initial testing
> > > covers
> > RC2 only.
> > >
> > > To attach e1000e devices and test all three RCs, I created a new
> > > test image with driver modifications. This is a temporary solution.
> > > A better approach is still needed to allow placing e1000e directly under bus
> 1.
> > >
> > > Test release:
> > > https://github.com/jamin-aspeed/openbmc/releases/tag/qemu-test-0907
> > > Image download:
> > >
> >
> https://github.com/jamin-aspeed/openbmc/releases/download/qemu-test-09
> > > 07/ast2700-default-pcie-qemu.tar.xz
> > > This image includes the following changes:
> > > Kernel patch (AST2700 RC mode + PCIe driver updates):
> > >
> >
> https://github.com/jamin-aspeed/openbmc/releases/download/qemu-test-09
> > > 07/0001-PCI-aspeed-Enable-AST2700-RC-mode-support-and-adjust.patch
> > >
> > > OpenBMC patch (installs e1000e modules into rootfs for testing):
> > >
> >
> https://github.com/jamin-aspeed/openbmc/releases/download/qemu-test-09
> > > 07/0001-packagegroup-aspeed-Add-Intel-e1000-e1000e-kernel-mo.patch
> > >
> > > QEMU Test Command
> > >
> > > Each PCIe RC bus adds a pcie-root-port with an e1000e NIC behind it:
> > >
> > > -device
> > pcie-root-port,id=root_port0,multifunction=on,slot=0,addr=1,bus=pcie.0
> > \
> > > -device e1000e,netdev=net0,bus=root_port0 \
> > > -netdev user,id=net0,hostfwd=:127.0.0.1:3222-:22,hostname=qemu0 \
> > > -device pcie-root-port,id=root_port1,slot=1,addr=2,bus=pcie.1 \
> > > -device e1000e,netdev=net1,bus=root_port1 \
> > > -netdev user,id=net1,hostfwd=:127.0.0.1:4222-:22,hostname=qemu1 \
> > > -device pcie-root-port,id=root_port2,slot=2,addr=3,bus=pcie.2 \
> > > -device e1000e,netdev=net2,bus=root_port2 \
> > > -netdev user,id=net2,hostfwd=:127.0.0.1:5222-:22,hostname=qemu2 \
> > >
> > > Expected Results
> > >
> > > With lspci, each RC should show the internal bridge, root port, and
> > > e1000e
> > endpoint:
> > >
> > > root@ast2700-default:~# lspci
> > > 0000:00:00.0 Host bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI
> > > Bridge
> > > 0000:00:01.0 PCI bridge: Red Hat, Inc. QEMU PCIe Root port
> > > 0000:01:00.0 Ethernet controller: Intel Corporation 82574L Gigabit
> > > Network Connection
> > > 0001:00:00.0 Host bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI
> > > Bridge
> > > 0001:00:02.0 PCI bridge: Red Hat, Inc. QEMU PCIe Root port
> > > 0001:01:00.0 Ethernet controller: Intel Corporation 82574L Gigabit
> > > Network Connection
> > > 0002:00:00.0 Host bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI
> > > Bridge
> > > 0002:00:03.0 PCI bridge: Red Hat, Inc. QEMU PCIe Root port
> > > 0002:01:00.0 Ethernet controller: Intel Corporation 82574L Gigabit
> > > Network Connection
> > >
> > > Load the e1000e driver:
> > > Kernel logs confirm device initialization and link-up at 1 Gbps Full
> > > Duplex on
> > eth2/eth3/eth4.
> > > root@ast2700-default:~# modprobe e1000e
> > > [ 59.181623] e1000e: Intel(R) PRO/1000 Network Driver
> > > [ 59.181926] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
> > > [ 59.183508] e1000e 0000:01:00.0: enabling device (0000 -> 0002)
> > > [ 59.188808] e1000e 0000:01:00.0: Interrupt Throttling Rate (ints/sec)
> set
> > to dynamic conservative mode
> > > [ 59.252590] e1000e 0000:01:00.0 0000:01:00.0 (uninitialized):
> registered
> > PHC clock
> > > [ 59.330877] e1000e 0000:01:00.0 eth2: (PCI Express:2.5GT/s:Width x1)
> > 52:54:00:12:34:56
> > > [ 59.331990] e1000e 0000:01:00.0 eth2: Intel(R) PRO/1000 Network
> > Connection
> > > [ 59.333211] e1000e 0000:01:00.0 eth2: MAC: 3, PHY: 8, PBA No:
> > 000000-000
> > > [ 59.334881] e1000e 0001:01:00.0: enabling device (0000 -> 0002)
> > > [ 59.341616] e1000e 0001:01:00.0: Interrupt Throttling Rate (ints/sec)
> set
> > to dynamic conservative mode
> > > [ 59.394712] e1000e 0001:01:00.0 0001:01:00.0 (uninitialized):
> registered
> > PHC clock
> > > [ 59.456674] e1000e 0001:01:00.0 eth3: (PCI Express:2.5GT/s:Width x1)
> > 52:54:00:12:34:57
> > > [ 59.457487] e1000e 0001:01:00.0 eth3: Intel(R) PRO/1000 Network
> > Connection
> > > [ 59.458033] e1000e 0001:01:00.0 eth3: MAC: 3, PHY: 8, PBA No:
> > 000000-000
> > > [ 59.460037] e1000e 0002:01:00.0: enabling device (0000 -> 0002)
> > > [ 59.466403] e1000e 0002:01:00.0: Interrupt Throttling Rate (ints/sec)
> set
> > to dynamic conservative mode
> > > [ 59.533361] e1000e 0002:01:00.0 0002:01:00.0 (uninitialized):
> registered
> > PHC clock
> > > [ 59.654491] 8021q: adding VLAN 0 to HW filter on device eth2
> > > [ 59.662100] e1000e 0002:01:00.0 eth4: (PCI Express:2.5GT/s:Width x1)
> > 52:54:00:12:34:58
> > > [ 59.662966] e1000e 0002:01:00.0 eth4: Intel(R) PRO/1000 Network
> > Connection
> > > [ 59.663527] e1000e 0002:01:00.0 eth4: MAC: 3, PHY: 8, PBA No:
> > 000000-000
> > > root@ast2700-default:~# [ 59.814984] 8021q: adding VLAN 0 to HW
> filter
> > on device eth3
> > > [ 59.938859] 8021q: adding VLAN 0 to HW filter on device eth4
> > > [ 59.954690] e1000e 0000:01:00.0 eth2: NIC Link is Up 1000 Mbps Full
> > Duplex, Flow Control: Rx/Tx
> > > [ 60.116790] e1000e 0001:01:00.0 eth3: NIC Link is Up 1000 Mbps Full
> > Duplex, Flow Control: Rx/Tx
> > > [ 60.237622] e1000e 0002:01:00.0 eth4: NIC Link is Up 1000 Mbps Full
> > Duplex, Flow Control: Rx/Tx
> > >
> > > After loading, users should see:
> > > eth2: PCIe0
> > > eth3: PCIe1
> > > eth4: PCIe2
> > >
> > > Example ifconfig output shows all interfaces (eth0-eth4) active,
> > > with
> > eth2-eth4 bound to the e1000e NICs.
> > > With this setup, all three PCIe RCs on AST2700 can be tested using
> > > e1000e
> > endpoints in QEMU.
> > >
> > > root@ast2700-default:~# ifconfig
> > > eth2 Link encap:Ethernet HWaddr 52:54:00:12:34:56
> > > inet addr:169.254.120.135 Bcast:169.254.255.255
> > Mask:255.255.0.0
> > > inet6 addr: fe80::5054:ff:fe12:3456/64 Scope:Link
> > > UP BROADCAST RUNNING MULTICAST MTU:1500
> Metric:1
> > > RX packets:19 errors:0 dropped:0 overruns:0 frame:0
> > > TX packets:51 errors:0 dropped:0 overruns:0 carrier:0
> > > collisions:0 txqueuelen:1000
> > > RX bytes:5227 (5.1 KiB) TX bytes:8551 (8.3 KiB)
> > > Interrupt:42 Memory:60040000-60060000
> > >
> > > eth3 Link encap:Ethernet HWaddr 52:54:00:12:34:57
> > > inet addr:169.254.237.52 Bcast:169.254.255.255
> > Mask:255.255.0.0
> > > inet6 addr: fe80::5054:ff:fe12:3457/64 Scope:Link
> > > UP BROADCAST RUNNING MULTICAST MTU:1500
> Metric:1
> > > RX packets:16 errors:0 dropped:0 overruns:0 frame:0
> > > TX packets:47 errors:0 dropped:0 overruns:0 carrier:0
> > > collisions:0 txqueuelen:1000
> > > RX bytes:4786 (4.6 KiB) TX bytes:8175 (7.9 KiB)
> > > Interrupt:45 Memory:80040000-80060000
> > >
> > > eth4 Link encap:Ethernet HWaddr 52:54:00:12:34:58
> > > inet addr:169.254.84.173 Bcast:169.254.255.255
> > Mask:255.255.0.0
> > > inet6 addr: fe80::5054:ff:fe12:3458/64 Scope:Link
> > > UP BROADCAST RUNNING MULTICAST MTU:1500
> Metric:1
> > > RX packets:16 errors:0 dropped:0 overruns:0 frame:0
> > > TX packets:47 errors:0 dropped:0 overruns:0 carrier:0
> > > collisions:0 txqueuelen:1000
> > > RX bytes:4786 (4.6 KiB) TX bytes:8191 (7.9 KiB)
> > > Interrupt:48 Memory:a0040000-a0060000
> > >
> > > Jamin Lin (11):
> > > hw/pci/pci_ids Add PCI vendor ID for ASPEED
> > > hw/pci-host/aspeed: Add AST2600 PCIe PHY model
> > > hw/pci-host/aspeed: Add AST2600 PCIe config and host bridge
> > > hw/pci-host/aspeed: Add MSI support and per-RC IOMMU address
> space
> > > hw/arm/aspeed: Wire up PCIe devices in SoC model
> > > hw/arm/aspeed_ast2600: Add PCIe RC support (RC_H only)
> > > tests/functional/test_arm_aspeed_ast2600: Add PCIe test via root port
> > > and e1000e
> > > hw/pci-host/aspeed: Add AST2700 PCIe PHY
> > > hw/pci-host/aspeed: Add AST2700 PCIe config with dedicated H2X
> blocks
> > > hw/arm/aspeed_ast27x0: Introduce 3 PCIe RCs for AST2700
> > > tests/functional: Add PCIe presence test for AST2700
> > >
> > > include/hw/arm/aspeed_soc.h | 14 +
> > > include/hw/pci-host/aspeed_pcie.h | 125 +++
> > > include/hw/pci/pci_ids.h | 2 +
> > > hw/arm/aspeed_ast2600.c | 69 +-
> > > hw/arm/aspeed_ast27x0.c | 61 ++
> > > hw/pci-host/aspeed_pcie.c | 955
> > ++++++++++++++++++
> > > hw/arm/Kconfig | 3 +
> > > hw/pci-host/Kconfig | 4 +
> > > hw/pci-host/meson.build | 1 +
> > > hw/pci-host/trace-events | 11 +
> > > .../functional/test_aarch64_aspeed_ast2700.py | 7 +
> > > .../test_aarch64_aspeed_ast2700fc.py | 6 +
> > > tests/functional/test_arm_aspeed_ast2600.py | 14 +
> > > 13 files changed, 1269 insertions(+), 3 deletions(-)
> > > create mode 100644 include/hw/pci-host/aspeed_pcie.h
> > > create mode 100644 hw/pci-host/aspeed_pcie.c
> > >
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