Hi Cédric,

I haven't run the "make check" or "make check-functional" tests yet, but I did verify that QEMU could boot the official image properly after applying each patch.
I'll run the tests soon, and if I find anything, I'll let you know.

Best Regards,
Kane
> -----Original Message-----
> From: Cédric Le Goater <clg@redhat.com>
> Sent: Wednesday, November 5, 2025 6:27 PM
> To: Kane Chen <kane_chen@aspeedtech.com>; Peter Maydell
> <peter.maydell@linaro.org>; Steven Lee <steven_lee@aspeedtech.com>; Troy
> Lee <leetroy@gmail.com>; Jamin Lin <jamin_lin@aspeedtech.com>; Andrew
> Jeffery <andrew@codeconstruct.com.au>; Joel Stanley <joel@jms.id.au>;
> open list:ASPEED BMCs <qemu-arm@nongnu.org>; open list:All patches CC
> here <qemu-devel@nongnu.org>
> Cc: Troy Lee <troy_lee@aspeedtech.com>
> Subject: Re: [PATCH v2 00/17] hw/arm/aspeed: AST1700 LTPI support and
> device hookups
> 
> On 11/5/25 04:58, Kane Chen wrote:
> > From: Kane-Chen-AS <kane_chen@aspeedtech.com>
> >
> > Hi all,
> >
> > LTPI (LVDS Tunneling Protocol & Interface) is defined in the OCP
> > DC-SCM
> > 2.0 specification (see Figure 2):
> > https://www.opencompute.org/documents/ocp-dc-scm-2-0-ltpi-ver-1-0-pdf
> >
> > LTPI provides a protocol and physical interface for tunneling various
> > low-speed signals between the Host Processor Module (HPM) and the
> > Satellite Controller Module (SCM). In Figure 2 of the specification,
> > the AST27x0 SoC (left) integrates two LTPI controllers, allowing it to
> > connect to up to two AST1700 boards. On the other side, the AST1700
> > consolidates HPM FPGA functions and multiple peripheral interfaces
> > (GPIO, UART, I2C, I3C, etc.) onto a single board.
> >
> > Because the AST1700 exposes additional I/O interfaces (GPIO, I2C, I3C,
> > and others), it acts as an I/O expander. Once connected over LTPI, the
> > AST27x0 can control additional downstream devices through this link.
> >
> > This patch series introduces a basic LTPI controller model and wires
> > it into the AST27x0 SoC. It also adds the AST1700-specific LTPI
> > expander device and gradually connects common peripherals on the
> AST1700 model.
> > For blocks that are not yet functionally implemented (I3C, SGPIOM,
> > PWM), their MMIO regions are modeled as unimplemented devices to
> > reserve address space and make the missing functionality explicit,
> > ensuring that guest probing remains stable.
> >
> > In the official release images, the AST1700 functions are not included
> > by default. To test the AST1700-related functionality, please include
> > the following DTS files for probing:
> >
> https://github.com/AspeedTech-BMC/linux/blob/aspeed-master-v6.6/arch/a
> > rm64/boot/dts/aspeed/aspeed-ltpi0.dtsi
> >
> https://github.com/AspeedTech-BMC/linux/blob/aspeed-master-v6.6/arch/a
> > rm64/boot/dts/aspeed/aspeed-ltpi1.dtsi
> >
> > After including these DTS files in the BMC image, you can verify LTPI
> > functionality using the following scenarios:
> >
> > 1. In U-Boot:
> >     Run the ltpi command to trigger the LTPI connection and display the
> >     current connection status.
> > 2. In BMC Linux:
> >     Run i2cdetect -y <16-38> to scan and test the I2C buses exposed by
> >     the AST1700.
> >
> > Any feedback or suggestions are appreciated!
> >
> 
> Thanks for the update. The models look better. Let's consider them for QEMU
> 11.0.
> 
> 
> Did you run "make check" and "make check-functional" ?
> 
> Thanks,
> 
> C.