Hi Cédric,

> -----Original Message-----
> From: Cédric Le Goater <clg@kaod.org>
> Sent: Wednesday, April 30, 2025 5:31 PM
> To: Steven Lee <steven_lee@aspeedtech.com>; Peter Maydell
> <peter.maydell@linaro.org>; Troy Lee <leetroy@gmail.com>; Jamin Lin
> <jamin_lin@aspeedtech.com>; Andrew Jeffery
> <andrew@codeconstruct.com.au>; Joel Stanley <joel@jms.id.au>; open
> list:ASPEED BMCs <qemu-arm@nongnu.org>; open list:All patches CC here
> <qemu-devel@nongnu.org>
> Cc: Troy Lee <troy_lee@aspeedtech.com>; longzl2@lenovo.com; Yunlin Tang
> <yunlin.tang@aspeedtech.com>
> Subject: Re: [PATCH v3 0/9] Introduce AST27x0 multi-SoC machine
> 
> Hello Steven,
> 
> On 4/29/25 11:18, Steven Lee wrote:
> > This patch series introduces full core support for the AST27x0 SoC, along with
> necessary updates to the ASPEED AST27x0 SOC.
> > The AST27x0 SoC is a new family of ASPEED SoCs featuring 4 Cortex-A35
> cores and 2 Cortex-M4 cores.
> >
> > v1:
> >    - Map unimplemented devices in SoC memory
> >    - Intruduce AST2700 CM4 SoC
> >    - Introduce AST27x0FC Machine
> >
> > v2:
> >    - Remove unused functions
> >    - Correct hex notation for device addresses in AST27x0 SoC
> >    - Add AST2700 SSP INTC and AST2700 TSP INTC
> >    - Split AST27x0 CM4 SoC to AST27x0 SSP SoC and AST27x0 TSP SoC
> >    - Add AST27x0 A0 SSP SoC and AST27x0 A1 SSP SoC
> >    - Add AST27x0 A0 TSP SoC and AST27x0 A1 TSP SoC
> >    - Add functional tests for AST2700FC A0 and AST2700FC A1
> >    - Add Documentation for AST2700FC
> >
> > v3:
> >    - Remove A0 SoC support and related functional tests
> 
> Please rebase on upstream QEMU before resending. There are new changes
> breaking this series (meson, class_init).
> 
> Also, try compiling the documentation too. The last patch has formatting
> issues.
> 

Thanks for the review.
I'll rebase the series on the top of https://github.com/legoater/qemu/commits/aspeed-next/
and fix the documentation formatting issues in the v4 patch series.

Regards,
Steven

> 
> 
> 
> > Steven Lee (9):
> >    aspeed: ast27x0: Map unimplemented devices in SoC memory
> >    aspeed: ast27x0: Correct hex notation for device addresses
> >    hw/intc/aspeed: Add support for AST2700 SSP INTC
> >    hw/intc/aspeed: Add support for AST2700 TSP INTC
> >    hw/arm/aspeed_ast27x0-ssp: Introduce AST27x0 A1 SSP SoC
> >    hw/arm/aspeed_ast27x0-tsp: Introduce AST27x0 A1 TSP SoC
> >    hw/arm: Introduce ASPEED AST2700 A1 full core machine
> >    tests/function/aspeed: Add functional test for AST2700FC
> >    docs: Add support for ast2700fc machine
> >
> >   docs/system/arm/aspeed.rst                 |  61 ++-
> >   include/hw/arm/aspeed_soc.h                |  32 ++
> >   include/hw/intc/aspeed_intc.h              |   5 +
> >   hw/arm/aspeed_ast27x0-fc.c                 | 192 ++++++++++
> >   hw/arm/aspeed_ast27x0-ssp.c                | 309
> +++++++++++++++
> >   hw/arm/aspeed_ast27x0-tsp.c                | 309
> +++++++++++++++
> >   hw/arm/aspeed_ast27x0.c                    |  79 +++-
> >   hw/intc/aspeed_intc.c                      | 424
> +++++++++++++++++++++
> >   hw/arm/meson.build                         |   6 +-
> >   tests/functional/test_aarch64_ast2700fc.py | 137 +++++++
> >   10 files changed, 1530 insertions(+), 24 deletions(-)
> >   create mode 100644 hw/arm/aspeed_ast27x0-fc.c
> >   create mode 100644 hw/arm/aspeed_ast27x0-ssp.c
> >   create mode 100644 hw/arm/aspeed_ast27x0-tsp.c
> >   create mode 100755 tests/functional/test_aarch64_ast2700fc.py
> >

On 5/2/25 03:22, Steven Lee wrote:
> Hi Cédric,
> 
>> -----Original Message-----
>> From: Cédric Le Goater <clg@kaod.org>
>> Sent: Wednesday, April 30, 2025 5:31 PM
>> To: Steven Lee <steven_lee@aspeedtech.com>; Peter Maydell
>> <peter.maydell@linaro.org>; Troy Lee <leetroy@gmail.com>; Jamin Lin
>> <jamin_lin@aspeedtech.com>; Andrew Jeffery
>> <andrew@codeconstruct.com.au>; Joel Stanley <joel@jms.id.au>; open
>> list:ASPEED BMCs <qemu-arm@nongnu.org>; open list:All patches CC here
>> <qemu-devel@nongnu.org>
>> Cc: Troy Lee <troy_lee@aspeedtech.com>; longzl2@lenovo.com; Yunlin Tang
>> <yunlin.tang@aspeedtech.com>
>> Subject: Re: [PATCH v3 0/9] Introduce AST27x0 multi-SoC machine
>>
>> Hello Steven,
>>
>> On 4/29/25 11:18, Steven Lee wrote:
>>> This patch series introduces full core support for the AST27x0 SoC, along with
>> necessary updates to the ASPEED AST27x0 SOC.
>>> The AST27x0 SoC is a new family of ASPEED SoCs featuring 4 Cortex-A35
>> cores and 2 Cortex-M4 cores.
>>>
>>> v1:
>>>     - Map unimplemented devices in SoC memory
>>>     - Intruduce AST2700 CM4 SoC
>>>     - Introduce AST27x0FC Machine
>>>
>>> v2:
>>>     - Remove unused functions
>>>     - Correct hex notation for device addresses in AST27x0 SoC
>>>     - Add AST2700 SSP INTC and AST2700 TSP INTC
>>>     - Split AST27x0 CM4 SoC to AST27x0 SSP SoC and AST27x0 TSP SoC
>>>     - Add AST27x0 A0 SSP SoC and AST27x0 A1 SSP SoC
>>>     - Add AST27x0 A0 TSP SoC and AST27x0 A1 TSP SoC
>>>     - Add functional tests for AST2700FC A0 and AST2700FC A1
>>>     - Add Documentation for AST2700FC
>>>
>>> v3:
>>>     - Remove A0 SoC support and related functional tests
>>
>> Please rebase on upstream QEMU before resending. There are new changes
>> breaking this series (meson, class_init).
>>
>> Also, try compiling the documentation too. The last patch has formatting
>> issues.
>>
> 
> Thanks for the review.
> I'll rebase the series on the top of https://github.com/legoater/qemu/commits/aspeed-next/
> and fix the documentation formatting issues in the v4 patch series.
perfect.

I should merge it on top then.


Thanks,

C.