Signed-off-by: Jim Wilson <jimw@sifive.com>
---
 configure                   |   1 +
 gdb-xml/riscv-32bit-cpu.xml |  43 ++++++++
 gdb-xml/riscv-32bit-csr.xml | 250 ++++++++++++++++++++++++++++++++++++++++++++
 gdb-xml/riscv-32bit-fpu.xml |  46 ++++++++
 4 files changed, 340 insertions(+)
 create mode 100644 gdb-xml/riscv-32bit-cpu.xml
 create mode 100644 gdb-xml/riscv-32bit-csr.xml
 create mode 100644 gdb-xml/riscv-32bit-fpu.xml

diff --git a/configure b/configure
index 224d307..4e05eed 100755
--- a/configure
+++ b/configure
@@ -7208,6 +7208,7 @@ case "$target_name" in
     TARGET_BASE_ARCH=riscv
     TARGET_ABI_DIR=riscv
     mttcg=yes
+    gdb_xml_files="riscv-32bit-cpu.xml riscv-32bit-fpu.xml riscv-32bit-csr.xml"
     target_compiler=$cross_cc_riscv32
   ;;
   riscv64)
diff --git a/gdb-xml/riscv-32bit-cpu.xml b/gdb-xml/riscv-32bit-cpu.xml
new file mode 100644
index 0000000..c02f86c
--- /dev/null
+++ b/gdb-xml/riscv-32bit-cpu.xml
@@ -0,0 +1,43 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2018 Free Software Foundation, Inc.
+
+     Copying and distribution of this file, with or without modification,
+     are permitted in any medium without royalty provided the copyright
+     notice and this notice are preserved.  -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.riscv.cpu">
+  <reg name="zero" bitsize="32" type="int"/>
+  <reg name="ra" bitsize="32" type="code_ptr"/>
+  <reg name="sp" bitsize="32" type="data_ptr"/>
+  <reg name="gp" bitsize="32" type="data_ptr"/>
+  <reg name="tp" bitsize="32" type="data_ptr"/>
+  <reg name="t0" bitsize="32" type="int"/>
+  <reg name="t1" bitsize="32" type="int"/>
+  <reg name="t2" bitsize="32" type="int"/>
+  <reg name="fp" bitsize="32" type="data_ptr"/>
+  <reg name="s1" bitsize="32" type="int"/>
+  <reg name="a0" bitsize="32" type="int"/>
+  <reg name="a1" bitsize="32" type="int"/>
+  <reg name="a2" bitsize="32" type="int"/>
+  <reg name="a3" bitsize="32" type="int"/>
+  <reg name="a4" bitsize="32" type="int"/>
+  <reg name="a5" bitsize="32" type="int"/>
+  <reg name="a6" bitsize="32" type="int"/>
+  <reg name="a7" bitsize="32" type="int"/>
+  <reg name="s2" bitsize="32" type="int"/>
+  <reg name="s3" bitsize="32" type="int"/>
+  <reg name="s4" bitsize="32" type="int"/>
+  <reg name="s5" bitsize="32" type="int"/>
+  <reg name="s6" bitsize="32" type="int"/>
+  <reg name="s7" bitsize="32" type="int"/>
+  <reg name="s8" bitsize="32" type="int"/>
+  <reg name="s9" bitsize="32" type="int"/>
+  <reg name="s10" bitsize="32" type="int"/>
+  <reg name="s11" bitsize="32" type="int"/>
+  <reg name="t3" bitsize="32" type="int"/>
+  <reg name="t4" bitsize="32" type="int"/>
+  <reg name="t5" bitsize="32" type="int"/>
+  <reg name="t6" bitsize="32" type="int"/>
+  <reg name="pc" bitsize="32" type="code_ptr"/>
+</feature>
diff --git a/gdb-xml/riscv-32bit-csr.xml b/gdb-xml/riscv-32bit-csr.xml
new file mode 100644
index 0000000..4aea9e6
--- /dev/null
+++ b/gdb-xml/riscv-32bit-csr.xml
@@ -0,0 +1,250 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2018 Free Software Foundation, Inc.
+
+     Copying and distribution of this file, with or without modification,
+     are permitted in any medium without royalty provided the copyright
+     notice and this notice are preserved.  -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.riscv.csr">
+  <reg name="ustatus" bitsize="32"/>
+  <reg name="uie" bitsize="32"/>
+  <reg name="utvec" bitsize="32"/>
+  <reg name="uscratch" bitsize="32"/>
+  <reg name="uepc" bitsize="32"/>
+  <reg name="ucause" bitsize="32"/>
+  <reg name="utval" bitsize="32"/>
+  <reg name="uip" bitsize="32"/>
+  <reg name="fflags" bitsize="32"/>
+  <reg name="frm" bitsize="32"/>
+  <reg name="fcsr" bitsize="32"/>
+  <reg name="cycle" bitsize="32"/>
+  <reg name="time" bitsize="32"/>
+  <reg name="instret" bitsize="32"/>
+  <reg name="hpmcounter3" bitsize="32"/>
+  <reg name="hpmcounter4" bitsize="32"/>
+  <reg name="hpmcounter5" bitsize="32"/>
+  <reg name="hpmcounter6" bitsize="32"/>
+  <reg name="hpmcounter7" bitsize="32"/>
+  <reg name="hpmcounter8" bitsize="32"/>
+  <reg name="hpmcounter9" bitsize="32"/>
+  <reg name="hpmcounter10" bitsize="32"/>
+  <reg name="hpmcounter11" bitsize="32"/>
+  <reg name="hpmcounter12" bitsize="32"/>
+  <reg name="hpmcounter13" bitsize="32"/>
+  <reg name="hpmcounter14" bitsize="32"/>
+  <reg name="hpmcounter15" bitsize="32"/>
+  <reg name="hpmcounter16" bitsize="32"/>
+  <reg name="hpmcounter17" bitsize="32"/>
+  <reg name="hpmcounter18" bitsize="32"/>
+  <reg name="hpmcounter19" bitsize="32"/>
+  <reg name="hpmcounter20" bitsize="32"/>
+  <reg name="hpmcounter21" bitsize="32"/>
+  <reg name="hpmcounter22" bitsize="32"/>
+  <reg name="hpmcounter23" bitsize="32"/>
+  <reg name="hpmcounter24" bitsize="32"/>
+  <reg name="hpmcounter25" bitsize="32"/>
+  <reg name="hpmcounter26" bitsize="32"/>
+  <reg name="hpmcounter27" bitsize="32"/>
+  <reg name="hpmcounter28" bitsize="32"/>
+  <reg name="hpmcounter29" bitsize="32"/>
+  <reg name="hpmcounter30" bitsize="32"/>
+  <reg name="hpmcounter31" bitsize="32"/>
+  <reg name="cycleh" bitsize="32"/>
+  <reg name="timeh" bitsize="32"/>
+  <reg name="instreth" bitsize="32"/>
+  <reg name="hpmcounter3h" bitsize="32"/>
+  <reg name="hpmcounter4h" bitsize="32"/>
+  <reg name="hpmcounter5h" bitsize="32"/>
+  <reg name="hpmcounter6h" bitsize="32"/>
+  <reg name="hpmcounter7h" bitsize="32"/>
+  <reg name="hpmcounter8h" bitsize="32"/>
+  <reg name="hpmcounter9h" bitsize="32"/>
+  <reg name="hpmcounter10h" bitsize="32"/>
+  <reg name="hpmcounter11h" bitsize="32"/>
+  <reg name="hpmcounter12h" bitsize="32"/>
+  <reg name="hpmcounter13h" bitsize="32"/>
+  <reg name="hpmcounter14h" bitsize="32"/>
+  <reg name="hpmcounter15h" bitsize="32"/>
+  <reg name="hpmcounter16h" bitsize="32"/>
+  <reg name="hpmcounter17h" bitsize="32"/>
+  <reg name="hpmcounter18h" bitsize="32"/>
+  <reg name="hpmcounter19h" bitsize="32"/>
+  <reg name="hpmcounter20h" bitsize="32"/>
+  <reg name="hpmcounter21h" bitsize="32"/>
+  <reg name="hpmcounter22h" bitsize="32"/>
+  <reg name="hpmcounter23h" bitsize="32"/>
+  <reg name="hpmcounter24h" bitsize="32"/>
+  <reg name="hpmcounter25h" bitsize="32"/>
+  <reg name="hpmcounter26h" bitsize="32"/>
+  <reg name="hpmcounter27h" bitsize="32"/>
+  <reg name="hpmcounter28h" bitsize="32"/>
+  <reg name="hpmcounter29h" bitsize="32"/>
+  <reg name="hpmcounter30h" bitsize="32"/>
+  <reg name="hpmcounter31h" bitsize="32"/>
+  <reg name="sstatus" bitsize="32"/>
+  <reg name="sedeleg" bitsize="32"/>
+  <reg name="sideleg" bitsize="32"/>
+  <reg name="sie" bitsize="32"/>
+  <reg name="stvec" bitsize="32"/>
+  <reg name="scounteren" bitsize="32"/>
+  <reg name="sscratch" bitsize="32"/>
+  <reg name="sepc" bitsize="32"/>
+  <reg name="scause" bitsize="32"/>
+  <reg name="stval" bitsize="32"/>
+  <reg name="sip" bitsize="32"/>
+  <reg name="satp" bitsize="32"/>
+  <reg name="mvendorid" bitsize="32"/>
+  <reg name="marchid" bitsize="32"/>
+  <reg name="mimpid" bitsize="32"/>
+  <reg name="mhartid" bitsize="32"/>
+  <reg name="mstatus" bitsize="32"/>
+  <reg name="misa" bitsize="32"/>
+  <reg name="medeleg" bitsize="32"/>
+  <reg name="mideleg" bitsize="32"/>
+  <reg name="mie" bitsize="32"/>
+  <reg name="mtvec" bitsize="32"/>
+  <reg name="mcounteren" bitsize="32"/>
+  <reg name="mscratch" bitsize="32"/>
+  <reg name="mepc" bitsize="32"/>
+  <reg name="mcause" bitsize="32"/>
+  <reg name="mtval" bitsize="32"/>
+  <reg name="mip" bitsize="32"/>
+  <reg name="pmpcfg0" bitsize="32"/>
+  <reg name="pmpcfg1" bitsize="32"/>
+  <reg name="pmpcfg2" bitsize="32"/>
+  <reg name="pmpcfg3" bitsize="32"/>
+  <reg name="pmpaddr0" bitsize="32"/>
+  <reg name="pmpaddr1" bitsize="32"/>
+  <reg name="pmpaddr2" bitsize="32"/>
+  <reg name="pmpaddr3" bitsize="32"/>
+  <reg name="pmpaddr4" bitsize="32"/>
+  <reg name="pmpaddr5" bitsize="32"/>
+  <reg name="pmpaddr6" bitsize="32"/>
+  <reg name="pmpaddr7" bitsize="32"/>
+  <reg name="pmpaddr8" bitsize="32"/>
+  <reg name="pmpaddr9" bitsize="32"/>
+  <reg name="pmpaddr10" bitsize="32"/>
+  <reg name="pmpaddr11" bitsize="32"/>
+  <reg name="pmpaddr12" bitsize="32"/>
+  <reg name="pmpaddr13" bitsize="32"/>
+  <reg name="pmpaddr14" bitsize="32"/>
+  <reg name="pmpaddr15" bitsize="32"/>
+  <reg name="mcycle" bitsize="32"/>
+  <reg name="minstret" bitsize="32"/>
+  <reg name="mhpmcounter3" bitsize="32"/>
+  <reg name="mhpmcounter4" bitsize="32"/>
+  <reg name="mhpmcounter5" bitsize="32"/>
+  <reg name="mhpmcounter6" bitsize="32"/>
+  <reg name="mhpmcounter7" bitsize="32"/>
+  <reg name="mhpmcounter8" bitsize="32"/>
+  <reg name="mhpmcounter9" bitsize="32"/>
+  <reg name="mhpmcounter10" bitsize="32"/>
+  <reg name="mhpmcounter11" bitsize="32"/>
+  <reg name="mhpmcounter12" bitsize="32"/>
+  <reg name="mhpmcounter13" bitsize="32"/>
+  <reg name="mhpmcounter14" bitsize="32"/>
+  <reg name="mhpmcounter15" bitsize="32"/>
+  <reg name="mhpmcounter16" bitsize="32"/>
+  <reg name="mhpmcounter17" bitsize="32"/>
+  <reg name="mhpmcounter18" bitsize="32"/>
+  <reg name="mhpmcounter19" bitsize="32"/>
+  <reg name="mhpmcounter20" bitsize="32"/>
+  <reg name="mhpmcounter21" bitsize="32"/>
+  <reg name="mhpmcounter22" bitsize="32"/>
+  <reg name="mhpmcounter23" bitsize="32"/>
+  <reg name="mhpmcounter24" bitsize="32"/>
+  <reg name="mhpmcounter25" bitsize="32"/>
+  <reg name="mhpmcounter26" bitsize="32"/>
+  <reg name="mhpmcounter27" bitsize="32"/>
+  <reg name="mhpmcounter28" bitsize="32"/>
+  <reg name="mhpmcounter29" bitsize="32"/>
+  <reg name="mhpmcounter30" bitsize="32"/>
+  <reg name="mhpmcounter31" bitsize="32"/>
+  <reg name="mcycleh" bitsize="32"/>
+  <reg name="minstreth" bitsize="32"/>
+  <reg name="mhpmcounter3h" bitsize="32"/>
+  <reg name="mhpmcounter4h" bitsize="32"/>
+  <reg name="mhpmcounter5h" bitsize="32"/>
+  <reg name="mhpmcounter6h" bitsize="32"/>
+  <reg name="mhpmcounter7h" bitsize="32"/>
+  <reg name="mhpmcounter8h" bitsize="32"/>
+  <reg name="mhpmcounter9h" bitsize="32"/>
+  <reg name="mhpmcounter10h" bitsize="32"/>
+  <reg name="mhpmcounter11h" bitsize="32"/>
+  <reg name="mhpmcounter12h" bitsize="32"/>
+  <reg name="mhpmcounter13h" bitsize="32"/>
+  <reg name="mhpmcounter14h" bitsize="32"/>
+  <reg name="mhpmcounter15h" bitsize="32"/>
+  <reg name="mhpmcounter16h" bitsize="32"/>
+  <reg name="mhpmcounter17h" bitsize="32"/>
+  <reg name="mhpmcounter18h" bitsize="32"/>
+  <reg name="mhpmcounter19h" bitsize="32"/>
+  <reg name="mhpmcounter20h" bitsize="32"/>
+  <reg name="mhpmcounter21h" bitsize="32"/>
+  <reg name="mhpmcounter22h" bitsize="32"/>
+  <reg name="mhpmcounter23h" bitsize="32"/>
+  <reg name="mhpmcounter24h" bitsize="32"/>
+  <reg name="mhpmcounter25h" bitsize="32"/>
+  <reg name="mhpmcounter26h" bitsize="32"/>
+  <reg name="mhpmcounter27h" bitsize="32"/>
+  <reg name="mhpmcounter28h" bitsize="32"/>
+  <reg name="mhpmcounter29h" bitsize="32"/>
+  <reg name="mhpmcounter30h" bitsize="32"/>
+  <reg name="mhpmcounter31h" bitsize="32"/>
+  <reg name="mhpmevent3" bitsize="32"/>
+  <reg name="mhpmevent4" bitsize="32"/>
+  <reg name="mhpmevent5" bitsize="32"/>
+  <reg name="mhpmevent6" bitsize="32"/>
+  <reg name="mhpmevent7" bitsize="32"/>
+  <reg name="mhpmevent8" bitsize="32"/>
+  <reg name="mhpmevent9" bitsize="32"/>
+  <reg name="mhpmevent10" bitsize="32"/>
+  <reg name="mhpmevent11" bitsize="32"/>
+  <reg name="mhpmevent12" bitsize="32"/>
+  <reg name="mhpmevent13" bitsize="32"/>
+  <reg name="mhpmevent14" bitsize="32"/>
+  <reg name="mhpmevent15" bitsize="32"/>
+  <reg name="mhpmevent16" bitsize="32"/>
+  <reg name="mhpmevent17" bitsize="32"/>
+  <reg name="mhpmevent18" bitsize="32"/>
+  <reg name="mhpmevent19" bitsize="32"/>
+  <reg name="mhpmevent20" bitsize="32"/>
+  <reg name="mhpmevent21" bitsize="32"/>
+  <reg name="mhpmevent22" bitsize="32"/>
+  <reg name="mhpmevent23" bitsize="32"/>
+  <reg name="mhpmevent24" bitsize="32"/>
+  <reg name="mhpmevent25" bitsize="32"/>
+  <reg name="mhpmevent26" bitsize="32"/>
+  <reg name="mhpmevent27" bitsize="32"/>
+  <reg name="mhpmevent28" bitsize="32"/>
+  <reg name="mhpmevent29" bitsize="32"/>
+  <reg name="mhpmevent30" bitsize="32"/>
+  <reg name="mhpmevent31" bitsize="32"/>
+  <reg name="tselect" bitsize="32"/>
+  <reg name="tdata1" bitsize="32"/>
+  <reg name="tdata2" bitsize="32"/>
+  <reg name="tdata3" bitsize="32"/>
+  <reg name="dcsr" bitsize="32"/>
+  <reg name="dpc" bitsize="32"/>
+  <reg name="dscratch" bitsize="32"/>
+  <reg name="hstatus" bitsize="32"/>
+  <reg name="hedeleg" bitsize="32"/>
+  <reg name="hideleg" bitsize="32"/>
+  <reg name="hie" bitsize="32"/>
+  <reg name="htvec" bitsize="32"/>
+  <reg name="hscratch" bitsize="32"/>
+  <reg name="hepc" bitsize="32"/>
+  <reg name="hcause" bitsize="32"/>
+  <reg name="hbadaddr" bitsize="32"/>
+  <reg name="hip" bitsize="32"/>
+  <reg name="mbase" bitsize="32"/>
+  <reg name="mbound" bitsize="32"/>
+  <reg name="mibase" bitsize="32"/>
+  <reg name="mibound" bitsize="32"/>
+  <reg name="mdbase" bitsize="32"/>
+  <reg name="mdbound" bitsize="32"/>
+  <reg name="mucounteren" bitsize="32"/>
+  <reg name="mscounteren" bitsize="32"/>
+  <reg name="mhcounteren" bitsize="32"/>
+</feature>
diff --git a/gdb-xml/riscv-32bit-fpu.xml b/gdb-xml/riscv-32bit-fpu.xml
new file mode 100644
index 0000000..783287d
--- /dev/null
+++ b/gdb-xml/riscv-32bit-fpu.xml
@@ -0,0 +1,46 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2018 Free Software Foundation, Inc.
+
+     Copying and distribution of this file, with or without modification,
+     are permitted in any medium without royalty provided the copyright
+     notice and this notice are preserved.  -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.riscv.fpu">
+  <reg name="ft0" bitsize="32" type="ieee_single"/>
+  <reg name="ft1" bitsize="32" type="ieee_single"/>
+  <reg name="ft2" bitsize="32" type="ieee_single"/>
+  <reg name="ft3" bitsize="32" type="ieee_single"/>
+  <reg name="ft4" bitsize="32" type="ieee_single"/>
+  <reg name="ft5" bitsize="32" type="ieee_single"/>
+  <reg name="ft6" bitsize="32" type="ieee_single"/>
+  <reg name="ft7" bitsize="32" type="ieee_single"/>
+  <reg name="fs0" bitsize="32" type="ieee_single"/>
+  <reg name="fs1" bitsize="32" type="ieee_single"/>
+  <reg name="fa0" bitsize="32" type="ieee_single"/>
+  <reg name="fa1" bitsize="32" type="ieee_single"/>
+  <reg name="fa2" bitsize="32" type="ieee_single"/>
+  <reg name="fa3" bitsize="32" type="ieee_single"/>
+  <reg name="fa4" bitsize="32" type="ieee_single"/>
+  <reg name="fa5" bitsize="32" type="ieee_single"/>
+  <reg name="fa6" bitsize="32" type="ieee_single"/>
+  <reg name="fa7" bitsize="32" type="ieee_single"/>
+  <reg name="fs2" bitsize="32" type="ieee_single"/>
+  <reg name="fs3" bitsize="32" type="ieee_single"/>
+  <reg name="fs4" bitsize="32" type="ieee_single"/>
+  <reg name="fs5" bitsize="32" type="ieee_single"/>
+  <reg name="fs6" bitsize="32" type="ieee_single"/>
+  <reg name="fs7" bitsize="32" type="ieee_single"/>
+  <reg name="fs8" bitsize="32" type="ieee_single"/>
+  <reg name="fs9" bitsize="32" type="ieee_single"/>
+  <reg name="fs10" bitsize="32" type="ieee_single"/>
+  <reg name="fs11" bitsize="32" type="ieee_single"/>
+  <reg name="ft8" bitsize="32" type="ieee_single"/>
+  <reg name="ft9" bitsize="32" type="ieee_single"/>
+  <reg name="ft10" bitsize="32" type="ieee_single"/>
+  <reg name="ft11" bitsize="32" type="ieee_single"/>
+
+  <reg name="fflags" bitsize="32" type="int"/>
+  <reg name="frm" bitsize="32" type="int"/>
+  <reg name="fcsr" bitsize="32" type="int"/>
+</feature>
-- 
2.7.4

On Fri, Dec 28, 2018 at 2:24 PM Jim Wilson <jimw@sifive.com> wrote:
>
> Signed-off-by: Jim Wilson <jimw@sifive.com>

Acked-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  configure                   |   1 +
>  gdb-xml/riscv-32bit-cpu.xml |  43 ++++++++
>  gdb-xml/riscv-32bit-csr.xml | 250 ++++++++++++++++++++++++++++++++++++++++++++
>  gdb-xml/riscv-32bit-fpu.xml |  46 ++++++++
>  4 files changed, 340 insertions(+)
>  create mode 100644 gdb-xml/riscv-32bit-cpu.xml
>  create mode 100644 gdb-xml/riscv-32bit-csr.xml
>  create mode 100644 gdb-xml/riscv-32bit-fpu.xml
>
> diff --git a/configure b/configure
> index 224d307..4e05eed 100755
> --- a/configure
> +++ b/configure
> @@ -7208,6 +7208,7 @@ case "$target_name" in
>      TARGET_BASE_ARCH=riscv
>      TARGET_ABI_DIR=riscv
>      mttcg=yes
> +    gdb_xml_files="riscv-32bit-cpu.xml riscv-32bit-fpu.xml riscv-32bit-csr.xml"
>      target_compiler=$cross_cc_riscv32
>    ;;
>    riscv64)
> diff --git a/gdb-xml/riscv-32bit-cpu.xml b/gdb-xml/riscv-32bit-cpu.xml
> new file mode 100644
> index 0000000..c02f86c
> --- /dev/null
> +++ b/gdb-xml/riscv-32bit-cpu.xml
> @@ -0,0 +1,43 @@
> +<?xml version="1.0"?>
> +<!-- Copyright (C) 2018 Free Software Foundation, Inc.
> +
> +     Copying and distribution of this file, with or without modification,
> +     are permitted in any medium without royalty provided the copyright
> +     notice and this notice are preserved.  -->
> +
> +<!DOCTYPE feature SYSTEM "gdb-target.dtd">
> +<feature name="org.gnu.gdb.riscv.cpu">
> +  <reg name="zero" bitsize="32" type="int"/>
> +  <reg name="ra" bitsize="32" type="code_ptr"/>
> +  <reg name="sp" bitsize="32" type="data_ptr"/>
> +  <reg name="gp" bitsize="32" type="data_ptr"/>
> +  <reg name="tp" bitsize="32" type="data_ptr"/>
> +  <reg name="t0" bitsize="32" type="int"/>
> +  <reg name="t1" bitsize="32" type="int"/>
> +  <reg name="t2" bitsize="32" type="int"/>
> +  <reg name="fp" bitsize="32" type="data_ptr"/>
> +  <reg name="s1" bitsize="32" type="int"/>
> +  <reg name="a0" bitsize="32" type="int"/>
> +  <reg name="a1" bitsize="32" type="int"/>
> +  <reg name="a2" bitsize="32" type="int"/>
> +  <reg name="a3" bitsize="32" type="int"/>
> +  <reg name="a4" bitsize="32" type="int"/>
> +  <reg name="a5" bitsize="32" type="int"/>
> +  <reg name="a6" bitsize="32" type="int"/>
> +  <reg name="a7" bitsize="32" type="int"/>
> +  <reg name="s2" bitsize="32" type="int"/>
> +  <reg name="s3" bitsize="32" type="int"/>
> +  <reg name="s4" bitsize="32" type="int"/>
> +  <reg name="s5" bitsize="32" type="int"/>
> +  <reg name="s6" bitsize="32" type="int"/>
> +  <reg name="s7" bitsize="32" type="int"/>
> +  <reg name="s8" bitsize="32" type="int"/>
> +  <reg name="s9" bitsize="32" type="int"/>
> +  <reg name="s10" bitsize="32" type="int"/>
> +  <reg name="s11" bitsize="32" type="int"/>
> +  <reg name="t3" bitsize="32" type="int"/>
> +  <reg name="t4" bitsize="32" type="int"/>
> +  <reg name="t5" bitsize="32" type="int"/>
> +  <reg name="t6" bitsize="32" type="int"/>
> +  <reg name="pc" bitsize="32" type="code_ptr"/>
> +</feature>
> diff --git a/gdb-xml/riscv-32bit-csr.xml b/gdb-xml/riscv-32bit-csr.xml
> new file mode 100644
> index 0000000..4aea9e6
> --- /dev/null
> +++ b/gdb-xml/riscv-32bit-csr.xml
> @@ -0,0 +1,250 @@
> +<?xml version="1.0"?>
> +<!-- Copyright (C) 2018 Free Software Foundation, Inc.
> +
> +     Copying and distribution of this file, with or without modification,
> +     are permitted in any medium without royalty provided the copyright
> +     notice and this notice are preserved.  -->
> +
> +<!DOCTYPE feature SYSTEM "gdb-target.dtd">
> +<feature name="org.gnu.gdb.riscv.csr">
> +  <reg name="ustatus" bitsize="32"/>
> +  <reg name="uie" bitsize="32"/>
> +  <reg name="utvec" bitsize="32"/>
> +  <reg name="uscratch" bitsize="32"/>
> +  <reg name="uepc" bitsize="32"/>
> +  <reg name="ucause" bitsize="32"/>
> +  <reg name="utval" bitsize="32"/>
> +  <reg name="uip" bitsize="32"/>
> +  <reg name="fflags" bitsize="32"/>
> +  <reg name="frm" bitsize="32"/>
> +  <reg name="fcsr" bitsize="32"/>
> +  <reg name="cycle" bitsize="32"/>
> +  <reg name="time" bitsize="32"/>
> +  <reg name="instret" bitsize="32"/>
> +  <reg name="hpmcounter3" bitsize="32"/>
> +  <reg name="hpmcounter4" bitsize="32"/>
> +  <reg name="hpmcounter5" bitsize="32"/>
> +  <reg name="hpmcounter6" bitsize="32"/>
> +  <reg name="hpmcounter7" bitsize="32"/>
> +  <reg name="hpmcounter8" bitsize="32"/>
> +  <reg name="hpmcounter9" bitsize="32"/>
> +  <reg name="hpmcounter10" bitsize="32"/>
> +  <reg name="hpmcounter11" bitsize="32"/>
> +  <reg name="hpmcounter12" bitsize="32"/>
> +  <reg name="hpmcounter13" bitsize="32"/>
> +  <reg name="hpmcounter14" bitsize="32"/>
> +  <reg name="hpmcounter15" bitsize="32"/>
> +  <reg name="hpmcounter16" bitsize="32"/>
> +  <reg name="hpmcounter17" bitsize="32"/>
> +  <reg name="hpmcounter18" bitsize="32"/>
> +  <reg name="hpmcounter19" bitsize="32"/>
> +  <reg name="hpmcounter20" bitsize="32"/>
> +  <reg name="hpmcounter21" bitsize="32"/>
> +  <reg name="hpmcounter22" bitsize="32"/>
> +  <reg name="hpmcounter23" bitsize="32"/>
> +  <reg name="hpmcounter24" bitsize="32"/>
> +  <reg name="hpmcounter25" bitsize="32"/>
> +  <reg name="hpmcounter26" bitsize="32"/>
> +  <reg name="hpmcounter27" bitsize="32"/>
> +  <reg name="hpmcounter28" bitsize="32"/>
> +  <reg name="hpmcounter29" bitsize="32"/>
> +  <reg name="hpmcounter30" bitsize="32"/>
> +  <reg name="hpmcounter31" bitsize="32"/>
> +  <reg name="cycleh" bitsize="32"/>
> +  <reg name="timeh" bitsize="32"/>
> +  <reg name="instreth" bitsize="32"/>
> +  <reg name="hpmcounter3h" bitsize="32"/>
> +  <reg name="hpmcounter4h" bitsize="32"/>
> +  <reg name="hpmcounter5h" bitsize="32"/>
> +  <reg name="hpmcounter6h" bitsize="32"/>
> +  <reg name="hpmcounter7h" bitsize="32"/>
> +  <reg name="hpmcounter8h" bitsize="32"/>
> +  <reg name="hpmcounter9h" bitsize="32"/>
> +  <reg name="hpmcounter10h" bitsize="32"/>
> +  <reg name="hpmcounter11h" bitsize="32"/>
> +  <reg name="hpmcounter12h" bitsize="32"/>
> +  <reg name="hpmcounter13h" bitsize="32"/>
> +  <reg name="hpmcounter14h" bitsize="32"/>
> +  <reg name="hpmcounter15h" bitsize="32"/>
> +  <reg name="hpmcounter16h" bitsize="32"/>
> +  <reg name="hpmcounter17h" bitsize="32"/>
> +  <reg name="hpmcounter18h" bitsize="32"/>
> +  <reg name="hpmcounter19h" bitsize="32"/>
> +  <reg name="hpmcounter20h" bitsize="32"/>
> +  <reg name="hpmcounter21h" bitsize="32"/>
> +  <reg name="hpmcounter22h" bitsize="32"/>
> +  <reg name="hpmcounter23h" bitsize="32"/>
> +  <reg name="hpmcounter24h" bitsize="32"/>
> +  <reg name="hpmcounter25h" bitsize="32"/>
> +  <reg name="hpmcounter26h" bitsize="32"/>
> +  <reg name="hpmcounter27h" bitsize="32"/>
> +  <reg name="hpmcounter28h" bitsize="32"/>
> +  <reg name="hpmcounter29h" bitsize="32"/>
> +  <reg name="hpmcounter30h" bitsize="32"/>
> +  <reg name="hpmcounter31h" bitsize="32"/>
> +  <reg name="sstatus" bitsize="32"/>
> +  <reg name="sedeleg" bitsize="32"/>
> +  <reg name="sideleg" bitsize="32"/>
> +  <reg name="sie" bitsize="32"/>
> +  <reg name="stvec" bitsize="32"/>
> +  <reg name="scounteren" bitsize="32"/>
> +  <reg name="sscratch" bitsize="32"/>
> +  <reg name="sepc" bitsize="32"/>
> +  <reg name="scause" bitsize="32"/>
> +  <reg name="stval" bitsize="32"/>
> +  <reg name="sip" bitsize="32"/>
> +  <reg name="satp" bitsize="32"/>
> +  <reg name="mvendorid" bitsize="32"/>
> +  <reg name="marchid" bitsize="32"/>
> +  <reg name="mimpid" bitsize="32"/>
> +  <reg name="mhartid" bitsize="32"/>
> +  <reg name="mstatus" bitsize="32"/>
> +  <reg name="misa" bitsize="32"/>
> +  <reg name="medeleg" bitsize="32"/>
> +  <reg name="mideleg" bitsize="32"/>
> +  <reg name="mie" bitsize="32"/>
> +  <reg name="mtvec" bitsize="32"/>
> +  <reg name="mcounteren" bitsize="32"/>
> +  <reg name="mscratch" bitsize="32"/>
> +  <reg name="mepc" bitsize="32"/>
> +  <reg name="mcause" bitsize="32"/>
> +  <reg name="mtval" bitsize="32"/>
> +  <reg name="mip" bitsize="32"/>
> +  <reg name="pmpcfg0" bitsize="32"/>
> +  <reg name="pmpcfg1" bitsize="32"/>
> +  <reg name="pmpcfg2" bitsize="32"/>
> +  <reg name="pmpcfg3" bitsize="32"/>
> +  <reg name="pmpaddr0" bitsize="32"/>
> +  <reg name="pmpaddr1" bitsize="32"/>
> +  <reg name="pmpaddr2" bitsize="32"/>
> +  <reg name="pmpaddr3" bitsize="32"/>
> +  <reg name="pmpaddr4" bitsize="32"/>
> +  <reg name="pmpaddr5" bitsize="32"/>
> +  <reg name="pmpaddr6" bitsize="32"/>
> +  <reg name="pmpaddr7" bitsize="32"/>
> +  <reg name="pmpaddr8" bitsize="32"/>
> +  <reg name="pmpaddr9" bitsize="32"/>
> +  <reg name="pmpaddr10" bitsize="32"/>
> +  <reg name="pmpaddr11" bitsize="32"/>
> +  <reg name="pmpaddr12" bitsize="32"/>
> +  <reg name="pmpaddr13" bitsize="32"/>
> +  <reg name="pmpaddr14" bitsize="32"/>
> +  <reg name="pmpaddr15" bitsize="32"/>
> +  <reg name="mcycle" bitsize="32"/>
> +  <reg name="minstret" bitsize="32"/>
> +  <reg name="mhpmcounter3" bitsize="32"/>
> +  <reg name="mhpmcounter4" bitsize="32"/>
> +  <reg name="mhpmcounter5" bitsize="32"/>
> +  <reg name="mhpmcounter6" bitsize="32"/>
> +  <reg name="mhpmcounter7" bitsize="32"/>
> +  <reg name="mhpmcounter8" bitsize="32"/>
> +  <reg name="mhpmcounter9" bitsize="32"/>
> +  <reg name="mhpmcounter10" bitsize="32"/>
> +  <reg name="mhpmcounter11" bitsize="32"/>
> +  <reg name="mhpmcounter12" bitsize="32"/>
> +  <reg name="mhpmcounter13" bitsize="32"/>
> +  <reg name="mhpmcounter14" bitsize="32"/>
> +  <reg name="mhpmcounter15" bitsize="32"/>
> +  <reg name="mhpmcounter16" bitsize="32"/>
> +  <reg name="mhpmcounter17" bitsize="32"/>
> +  <reg name="mhpmcounter18" bitsize="32"/>
> +  <reg name="mhpmcounter19" bitsize="32"/>
> +  <reg name="mhpmcounter20" bitsize="32"/>
> +  <reg name="mhpmcounter21" bitsize="32"/>
> +  <reg name="mhpmcounter22" bitsize="32"/>
> +  <reg name="mhpmcounter23" bitsize="32"/>
> +  <reg name="mhpmcounter24" bitsize="32"/>
> +  <reg name="mhpmcounter25" bitsize="32"/>
> +  <reg name="mhpmcounter26" bitsize="32"/>
> +  <reg name="mhpmcounter27" bitsize="32"/>
> +  <reg name="mhpmcounter28" bitsize="32"/>
> +  <reg name="mhpmcounter29" bitsize="32"/>
> +  <reg name="mhpmcounter30" bitsize="32"/>
> +  <reg name="mhpmcounter31" bitsize="32"/>
> +  <reg name="mcycleh" bitsize="32"/>
> +  <reg name="minstreth" bitsize="32"/>
> +  <reg name="mhpmcounter3h" bitsize="32"/>
> +  <reg name="mhpmcounter4h" bitsize="32"/>
> +  <reg name="mhpmcounter5h" bitsize="32"/>
> +  <reg name="mhpmcounter6h" bitsize="32"/>
> +  <reg name="mhpmcounter7h" bitsize="32"/>
> +  <reg name="mhpmcounter8h" bitsize="32"/>
> +  <reg name="mhpmcounter9h" bitsize="32"/>
> +  <reg name="mhpmcounter10h" bitsize="32"/>
> +  <reg name="mhpmcounter11h" bitsize="32"/>
> +  <reg name="mhpmcounter12h" bitsize="32"/>
> +  <reg name="mhpmcounter13h" bitsize="32"/>
> +  <reg name="mhpmcounter14h" bitsize="32"/>
> +  <reg name="mhpmcounter15h" bitsize="32"/>
> +  <reg name="mhpmcounter16h" bitsize="32"/>
> +  <reg name="mhpmcounter17h" bitsize="32"/>
> +  <reg name="mhpmcounter18h" bitsize="32"/>
> +  <reg name="mhpmcounter19h" bitsize="32"/>
> +  <reg name="mhpmcounter20h" bitsize="32"/>
> +  <reg name="mhpmcounter21h" bitsize="32"/>
> +  <reg name="mhpmcounter22h" bitsize="32"/>
> +  <reg name="mhpmcounter23h" bitsize="32"/>
> +  <reg name="mhpmcounter24h" bitsize="32"/>
> +  <reg name="mhpmcounter25h" bitsize="32"/>
> +  <reg name="mhpmcounter26h" bitsize="32"/>
> +  <reg name="mhpmcounter27h" bitsize="32"/>
> +  <reg name="mhpmcounter28h" bitsize="32"/>
> +  <reg name="mhpmcounter29h" bitsize="32"/>
> +  <reg name="mhpmcounter30h" bitsize="32"/>
> +  <reg name="mhpmcounter31h" bitsize="32"/>
> +  <reg name="mhpmevent3" bitsize="32"/>
> +  <reg name="mhpmevent4" bitsize="32"/>
> +  <reg name="mhpmevent5" bitsize="32"/>
> +  <reg name="mhpmevent6" bitsize="32"/>
> +  <reg name="mhpmevent7" bitsize="32"/>
> +  <reg name="mhpmevent8" bitsize="32"/>
> +  <reg name="mhpmevent9" bitsize="32"/>
> +  <reg name="mhpmevent10" bitsize="32"/>
> +  <reg name="mhpmevent11" bitsize="32"/>
> +  <reg name="mhpmevent12" bitsize="32"/>
> +  <reg name="mhpmevent13" bitsize="32"/>
> +  <reg name="mhpmevent14" bitsize="32"/>
> +  <reg name="mhpmevent15" bitsize="32"/>
> +  <reg name="mhpmevent16" bitsize="32"/>
> +  <reg name="mhpmevent17" bitsize="32"/>
> +  <reg name="mhpmevent18" bitsize="32"/>
> +  <reg name="mhpmevent19" bitsize="32"/>
> +  <reg name="mhpmevent20" bitsize="32"/>
> +  <reg name="mhpmevent21" bitsize="32"/>
> +  <reg name="mhpmevent22" bitsize="32"/>
> +  <reg name="mhpmevent23" bitsize="32"/>
> +  <reg name="mhpmevent24" bitsize="32"/>
> +  <reg name="mhpmevent25" bitsize="32"/>
> +  <reg name="mhpmevent26" bitsize="32"/>
> +  <reg name="mhpmevent27" bitsize="32"/>
> +  <reg name="mhpmevent28" bitsize="32"/>
> +  <reg name="mhpmevent29" bitsize="32"/>
> +  <reg name="mhpmevent30" bitsize="32"/>
> +  <reg name="mhpmevent31" bitsize="32"/>
> +  <reg name="tselect" bitsize="32"/>
> +  <reg name="tdata1" bitsize="32"/>
> +  <reg name="tdata2" bitsize="32"/>
> +  <reg name="tdata3" bitsize="32"/>
> +  <reg name="dcsr" bitsize="32"/>
> +  <reg name="dpc" bitsize="32"/>
> +  <reg name="dscratch" bitsize="32"/>
> +  <reg name="hstatus" bitsize="32"/>
> +  <reg name="hedeleg" bitsize="32"/>
> +  <reg name="hideleg" bitsize="32"/>
> +  <reg name="hie" bitsize="32"/>
> +  <reg name="htvec" bitsize="32"/>
> +  <reg name="hscratch" bitsize="32"/>
> +  <reg name="hepc" bitsize="32"/>
> +  <reg name="hcause" bitsize="32"/>
> +  <reg name="hbadaddr" bitsize="32"/>
> +  <reg name="hip" bitsize="32"/>
> +  <reg name="mbase" bitsize="32"/>
> +  <reg name="mbound" bitsize="32"/>
> +  <reg name="mibase" bitsize="32"/>
> +  <reg name="mibound" bitsize="32"/>
> +  <reg name="mdbase" bitsize="32"/>
> +  <reg name="mdbound" bitsize="32"/>
> +  <reg name="mucounteren" bitsize="32"/>
> +  <reg name="mscounteren" bitsize="32"/>
> +  <reg name="mhcounteren" bitsize="32"/>
> +</feature>
> diff --git a/gdb-xml/riscv-32bit-fpu.xml b/gdb-xml/riscv-32bit-fpu.xml
> new file mode 100644
> index 0000000..783287d
> --- /dev/null
> +++ b/gdb-xml/riscv-32bit-fpu.xml
> @@ -0,0 +1,46 @@
> +<?xml version="1.0"?>
> +<!-- Copyright (C) 2018 Free Software Foundation, Inc.
> +
> +     Copying and distribution of this file, with or without modification,
> +     are permitted in any medium without royalty provided the copyright
> +     notice and this notice are preserved.  -->
> +
> +<!DOCTYPE feature SYSTEM "gdb-target.dtd">
> +<feature name="org.gnu.gdb.riscv.fpu">
> +  <reg name="ft0" bitsize="32" type="ieee_single"/>
> +  <reg name="ft1" bitsize="32" type="ieee_single"/>
> +  <reg name="ft2" bitsize="32" type="ieee_single"/>
> +  <reg name="ft3" bitsize="32" type="ieee_single"/>
> +  <reg name="ft4" bitsize="32" type="ieee_single"/>
> +  <reg name="ft5" bitsize="32" type="ieee_single"/>
> +  <reg name="ft6" bitsize="32" type="ieee_single"/>
> +  <reg name="ft7" bitsize="32" type="ieee_single"/>
> +  <reg name="fs0" bitsize="32" type="ieee_single"/>
> +  <reg name="fs1" bitsize="32" type="ieee_single"/>
> +  <reg name="fa0" bitsize="32" type="ieee_single"/>
> +  <reg name="fa1" bitsize="32" type="ieee_single"/>
> +  <reg name="fa2" bitsize="32" type="ieee_single"/>
> +  <reg name="fa3" bitsize="32" type="ieee_single"/>
> +  <reg name="fa4" bitsize="32" type="ieee_single"/>
> +  <reg name="fa5" bitsize="32" type="ieee_single"/>
> +  <reg name="fa6" bitsize="32" type="ieee_single"/>
> +  <reg name="fa7" bitsize="32" type="ieee_single"/>
> +  <reg name="fs2" bitsize="32" type="ieee_single"/>
> +  <reg name="fs3" bitsize="32" type="ieee_single"/>
> +  <reg name="fs4" bitsize="32" type="ieee_single"/>
> +  <reg name="fs5" bitsize="32" type="ieee_single"/>
> +  <reg name="fs6" bitsize="32" type="ieee_single"/>
> +  <reg name="fs7" bitsize="32" type="ieee_single"/>
> +  <reg name="fs8" bitsize="32" type="ieee_single"/>
> +  <reg name="fs9" bitsize="32" type="ieee_single"/>
> +  <reg name="fs10" bitsize="32" type="ieee_single"/>
> +  <reg name="fs11" bitsize="32" type="ieee_single"/>
> +  <reg name="ft8" bitsize="32" type="ieee_single"/>
> +  <reg name="ft9" bitsize="32" type="ieee_single"/>
> +  <reg name="ft10" bitsize="32" type="ieee_single"/>
> +  <reg name="ft11" bitsize="32" type="ieee_single"/>
> +
> +  <reg name="fflags" bitsize="32" type="int"/>
> +  <reg name="frm" bitsize="32" type="int"/>
> +  <reg name="fcsr" bitsize="32" type="int"/>
> +</feature>
> --
> 2.7.4
>
>

On 12/29/18 9:07 AM, Jim Wilson wrote:
> Signed-off-by: Jim Wilson <jimw@sifive.com>
> ---
>  configure                   |   1 +
>  gdb-xml/riscv-32bit-cpu.xml |  43 ++++++++
>  gdb-xml/riscv-32bit-csr.xml | 250 ++++++++++++++++++++++++++++++++++++++++++++
>  gdb-xml/riscv-32bit-fpu.xml |  46 ++++++++
>  4 files changed, 340 insertions(+)
>  create mode 100644 gdb-xml/riscv-32bit-cpu.xml
>  create mode 100644 gdb-xml/riscv-32bit-csr.xml
>  create mode 100644 gdb-xml/riscv-32bit-fpu.xml

Don't the csr's vary between priv-1.9.1 and priv-1.10?

I wonder if it would be better to auto-generate these, via the
gdb_get_dynamic_xml hook.  That way you don't need near identical copies for
32-bit vs 64-bit.


r~

On Sat, Dec 29, 2018 at 2:20 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
> On 12/29/18 9:07 AM, Jim Wilson wrote:
> Don't the csr's vary between priv-1.9.1 and priv-1.10?

There are a few csr's that disappear in 1.10, but there is no known
hardware that implements them.  There are a few csr's new in 1.10, but
I don't know of any 1.9.1 systems that can run the software that
requires the new registers.  There are a few that change name; the
toolchain supports both the old and new names.  On the toolchain side,
currently, none of the tools care about the privilege spec version.
And the linux kernel doesn't care about the priv spec version either.
This will eventually have to change, maybe with 1.11, but so far it
hasn't been an issue with any software I've seen.

qemu has an option to specify the priv spec version.  But looking at
the csr's, this affects two of the registers that disappeared, which
were never implemented in hardware, and aren't supported by gdb.  This
also affects a few registers that have new fields in 1.10, but gdb
doesn't know about those internal register fields, so this doesn't
affect gdb either.

> I wonder if it would be better to auto-generate these, via the
> gdb_get_dynamic_xml hook.  That way you don't need near identical copies for
> 32-bit vs 64-bit.

I haven't tried looking at this, but I don't see a convenient list of
implemented csr's.  This list would be every csr that the
csr_read_helper function in target/riscv/op_helper.c supports  That
function requires some machine state that includes the register
values, so it doesn't look convenient to use, unless we add more
hackery to it.

Long term, it would be useful to have target specific csr register
lists.  Most csr's are optional, and most hardware only implements a
subset of them.  This is somewhat orthogonal to what I'm trying to do
here, but this would require a list of supported csr's in the target
hardware file, then this would have to be fed back into
csr_read_helper somehow, and then we could also use this to generate
an appropriate xml csr register file for that target for use with gdb.
Openocd already does something like this for a few supported targets.

Jim