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[Qemu-devel] [PATCH 4/5 v3] RISC-V: Add debug support for accessing CSRs.

Jim Wilson posted 5 patches 6 years, 9 months ago
Maintainers: Michael Clark <mjc@sifive.com>, Alistair Francis <Alistair.Francis@wdc.com>, Palmer Dabbelt <palmer@sifive.com>, Bastian Koppelmann <kbastian@mail.uni-paderborn.de>, Sagar Karandikar <sagark@eecs.berkeley.edu>
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[Qemu-devel] [PATCH 4/5 v3] RISC-V: Add debug support for accessing CSRs.
Posted by Jim Wilson 6 years, 9 months ago 
Adds a debugger field to CPURISCVState.  Disable mode checks in riscv_csrrw
when true.

Signed-off-by: Jim Wilson <jimw@sifive.com>
---
 target/riscv/cpu.h |  3 +++
 target/riscv/csr.c | 16 ++++++++--------
 2 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 743f02c..faa46d0 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -170,6 +170,9 @@ struct CPURISCVState {
 
     /* physical memory protection */
     pmp_table_t pmp_state;
+
+    /* True if in debugger mode.  */
+    bool debugger;
 #endif
 
     float_status fp_status;
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 5e7e7d1..04e6b59 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -46,7 +46,7 @@ void riscv_set_csr_ops(int csrno, riscv_csr_operations *ops)
 static int fs(CPURISCVState *env, int csrno)
 {
 #if !defined(CONFIG_USER_ONLY)
-    if (!(env->mstatus & MSTATUS_FS)) {
+    if (!env->debugger && !(env->mstatus & MSTATUS_FS)) {
         return -1;
     }
 #endif
@@ -58,7 +58,7 @@ static int ctr(CPURISCVState *env, int csrno)
 #if !defined(CONFIG_USER_ONLY)
     target_ulong ctr_en = env->priv == PRV_U ? env->scounteren :
                           env->priv == PRV_S ? env->mcounteren : -1U;
-    if (!(ctr_en & (1 << (csrno & 31)))) {
+    if (!env->debugger && !(ctr_en & (1 << (csrno & 31)))) {
         return -1;
     }
 #endif
@@ -86,7 +86,7 @@ static int pmp(CPURISCVState *env, int csrno)
 static int read_fflags(CPURISCVState *env, int csrno, target_ulong *val)
 {
 #if !defined(CONFIG_USER_ONLY)
-    if (!(env->mstatus & MSTATUS_FS)) {
+    if (!env->debugger && !(env->mstatus & MSTATUS_FS)) {
         return -1;
     }
 #endif
@@ -97,7 +97,7 @@ static int read_fflags(CPURISCVState *env, int csrno, target_ulong *val)
 static int write_fflags(CPURISCVState *env, int csrno, target_ulong val)
 {
 #if !defined(CONFIG_USER_ONLY)
-    if (!(env->mstatus & MSTATUS_FS)) {
+    if (!env->debugger && !(env->mstatus & MSTATUS_FS)) {
         return -1;
     }
     env->mstatus |= MSTATUS_FS;
@@ -109,7 +109,7 @@ static int write_fflags(CPURISCVState *env, int csrno, target_ulong val)
 static int read_frm(CPURISCVState *env, int csrno, target_ulong *val)
 {
 #if !defined(CONFIG_USER_ONLY)
-    if (!(env->mstatus & MSTATUS_FS)) {
+    if (!env->debugger && !(env->mstatus & MSTATUS_FS)) {
         return -1;
     }
 #endif
@@ -120,7 +120,7 @@ static int read_frm(CPURISCVState *env, int csrno, target_ulong *val)
 static int write_frm(CPURISCVState *env, int csrno, target_ulong val)
 {
 #if !defined(CONFIG_USER_ONLY)
-    if (!(env->mstatus & MSTATUS_FS)) {
+    if (!env->debugger && !(env->mstatus & MSTATUS_FS)) {
         return -1;
     }
     env->mstatus |= MSTATUS_FS;
@@ -132,7 +132,7 @@ static int write_frm(CPURISCVState *env, int csrno, target_ulong val)
 static int read_fcsr(CPURISCVState *env, int csrno, target_ulong *val)
 {
 #if !defined(CONFIG_USER_ONLY)
-    if (!(env->mstatus & MSTATUS_FS)) {
+    if (!env->debugger && !(env->mstatus & MSTATUS_FS)) {
         return -1;
     }
 #endif
@@ -144,7 +144,7 @@ static int read_fcsr(CPURISCVState *env, int csrno, target_ulong *val)
 static int write_fcsr(CPURISCVState *env, int csrno, target_ulong val)
 {
 #if !defined(CONFIG_USER_ONLY)
-    if (!(env->mstatus & MSTATUS_FS)) {
+    if (!env->debugger && !(env->mstatus & MSTATUS_FS)) {
         return -1;
     }
     env->mstatus |= MSTATUS_FS;
-- 
2.7.4
Re: [Qemu-devel] [PATCH 4/5 v3] RISC-V: Add debug support for accessing CSRs.
Posted by Alistair Francis 6 years, 9 months ago 
On Tue, Jan 29, 2019 at 6:57 PM Jim Wilson <jimw@sifive.com> wrote:
>
> Adds a debugger field to CPURISCVState.  Disable mode checks in riscv_csrrw
> when true.
>
> Signed-off-by: Jim Wilson <jimw@sifive.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/cpu.h |  3 +++
>  target/riscv/csr.c | 16 ++++++++--------
>  2 files changed, 11 insertions(+), 8 deletions(-)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 743f02c..faa46d0 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -170,6 +170,9 @@ struct CPURISCVState {
>
>      /* physical memory protection */
>      pmp_table_t pmp_state;
> +
> +    /* True if in debugger mode.  */
> +    bool debugger;
>  #endif
>
>      float_status fp_status;
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index 5e7e7d1..04e6b59 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -46,7 +46,7 @@ void riscv_set_csr_ops(int csrno, riscv_csr_operations *ops)
>  static int fs(CPURISCVState *env, int csrno)
>  {
>  #if !defined(CONFIG_USER_ONLY)
> -    if (!(env->mstatus & MSTATUS_FS)) {
> +    if (!env->debugger && !(env->mstatus & MSTATUS_FS)) {
>          return -1;
>      }
>  #endif
> @@ -58,7 +58,7 @@ static int ctr(CPURISCVState *env, int csrno)
>  #if !defined(CONFIG_USER_ONLY)
>      target_ulong ctr_en = env->priv == PRV_U ? env->scounteren :
>                            env->priv == PRV_S ? env->mcounteren : -1U;
> -    if (!(ctr_en & (1 << (csrno & 31)))) {
> +    if (!env->debugger && !(ctr_en & (1 << (csrno & 31)))) {
>          return -1;
>      }
>  #endif
> @@ -86,7 +86,7 @@ static int pmp(CPURISCVState *env, int csrno)
>  static int read_fflags(CPURISCVState *env, int csrno, target_ulong *val)
>  {
>  #if !defined(CONFIG_USER_ONLY)
> -    if (!(env->mstatus & MSTATUS_FS)) {
> +    if (!env->debugger && !(env->mstatus & MSTATUS_FS)) {
>          return -1;
>      }
>  #endif
> @@ -97,7 +97,7 @@ static int read_fflags(CPURISCVState *env, int csrno, target_ulong *val)
>  static int write_fflags(CPURISCVState *env, int csrno, target_ulong val)
>  {
>  #if !defined(CONFIG_USER_ONLY)
> -    if (!(env->mstatus & MSTATUS_FS)) {
> +    if (!env->debugger && !(env->mstatus & MSTATUS_FS)) {
>          return -1;
>      }
>      env->mstatus |= MSTATUS_FS;
> @@ -109,7 +109,7 @@ static int write_fflags(CPURISCVState *env, int csrno, target_ulong val)
>  static int read_frm(CPURISCVState *env, int csrno, target_ulong *val)
>  {
>  #if !defined(CONFIG_USER_ONLY)
> -    if (!(env->mstatus & MSTATUS_FS)) {
> +    if (!env->debugger && !(env->mstatus & MSTATUS_FS)) {
>          return -1;
>      }
>  #endif
> @@ -120,7 +120,7 @@ static int read_frm(CPURISCVState *env, int csrno, target_ulong *val)
>  static int write_frm(CPURISCVState *env, int csrno, target_ulong val)
>  {
>  #if !defined(CONFIG_USER_ONLY)
> -    if (!(env->mstatus & MSTATUS_FS)) {
> +    if (!env->debugger && !(env->mstatus & MSTATUS_FS)) {
>          return -1;
>      }
>      env->mstatus |= MSTATUS_FS;
> @@ -132,7 +132,7 @@ static int write_frm(CPURISCVState *env, int csrno, target_ulong val)
>  static int read_fcsr(CPURISCVState *env, int csrno, target_ulong *val)
>  {
>  #if !defined(CONFIG_USER_ONLY)
> -    if (!(env->mstatus & MSTATUS_FS)) {
> +    if (!env->debugger && !(env->mstatus & MSTATUS_FS)) {
>          return -1;
>      }
>  #endif
> @@ -144,7 +144,7 @@ static int read_fcsr(CPURISCVState *env, int csrno, target_ulong *val)
>  static int write_fcsr(CPURISCVState *env, int csrno, target_ulong val)
>  {
>  #if !defined(CONFIG_USER_ONLY)
> -    if (!(env->mstatus & MSTATUS_FS)) {
> +    if (!env->debugger && !(env->mstatus & MSTATUS_FS)) {
>          return -1;
>      }
>      env->mstatus |= MSTATUS_FS;
> --
> 2.7.4
>
>

Patchew 2.1-devel-b67e4c2

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