Fixes: corrects clobbering of registers appearing after k_gs_base
Buglink: https://bugs.launchpad.net/qemu/+bug/1857640

Signed-off-by: Marek Dolata <mkdolata@us.ibm.com<mailto:mkdolata@us.ibm.com>>
---
target/i386/gdbstub.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
index aef25b70f1..572ead641c 100644
--- a/target/i386/gdbstub.c
+++ b/target/i386/gdbstub.c
@@ -350,15 +350,15 @@ int x86_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
             env->segs[R_GS].base = ldl_p(mem_buf);
             return 4;
-#ifdef TARGET_X86_64
         case IDX_SEG_REGS + 8:
+#ifdef TARGET_X86_64
             if (env->hflags & HF_CS64_MASK) {
                 env->kernelgsbase = ldq_p(mem_buf);
                 return 8;
             }
             env->kernelgsbase = ldl_p(mem_buf);
-            return 4;
#endif
+            return 4;
         case IDX_FP_REGS + 8:
             cpu_set_fpuc(env, ldl_p(mem_buf));
--
2.24.1

Hi Marek,

Thanks for Cc'ing the maintainers :)

Still the same error occurs:

   Applying: target/i386: Fix handling of k_gs_base register in 32-bit 
mode in gdbstub
   error: corrupt patch at line 21
   Patch failed at 0001 target/i386: Fix handling of k_gs_base register 
in 32-bit mode in gdbstub

Please use a version number when you repost a patch, this is patch v2 
(next should be v3).

On 12/27/19 9:07 PM, Marek Dolata - mkdolata@us.ibm.com wrote:
> Fixes: corrects clobbering of registers appearing after k_gs_base
> 
> Buglink: https://bugs.launchpad.net/qemu/+bug/1857640
> 
> Signed-off-by: Marek Dolata <mkdolata@us.ibm.com 
> <mailto:mkdolata@us.ibm.com>>
> 
> ---
> 
> target/i386/gdbstub.c | 4 ++--
> 
> 1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
> 
> index aef25b70f1..572ead641c 100644
> 
> --- a/target/i386/gdbstub.c
> 
> +++ b/target/i386/gdbstub.c
> 
> @@ -350,15 +350,15 @@ int x86_cpu_gdb_write_register(CPUState *cs, 
> uint8_t *mem_buf, int n)
> 
>               env->segs[R_GS].base = ldl_p(mem_buf);
> 
>               return 4;
> 
> -#ifdef TARGET_X86_64
> 
>           case IDX_SEG_REGS + 8:
> 
> +#ifdef TARGET_X86_64
> 
>               if (env->hflags & HF_CS64_MASK) {
> 
>                   env->kernelgsbase = ldq_p(mem_buf);
> 
>                   return 8;
> 
>               }
> 
>               env->kernelgsbase = ldl_p(mem_buf);
> 
> -            return 4;
> 
> #endif
> 
> +            return 4;
> 
>           case IDX_FP_REGS + 8:
> 
>               cpu_set_fpuc(env, ldl_p(mem_buf));
> 
> -- 
> 
> 2.24.1
>