From 5de17d5aacb9cf21de4c9736b227b0498c607709 Mon Sep 17 00:00:00 2001
From: CHRIS HOWARD <cvz185@web.de>
Date: Thu, 12 May 2022 11:35:17 +0200
Subject: [PATCH] Fix aarch64 debug register names.

Signed-off-by: CHRIS HOWARD <cvz185@web.de>
---
 target/arm/helper.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 432bd81919..0dd97cb905 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6543,14 +6543,16 @@ static void define_debug_regs(ARMCPU *cpu)
     }
 
     for (i = 0; i < brps; i++) {
+        char *dbgbvr_el1_name = g_strdup_printf("DBGBVR%d_EL1", i);
+        char *dbgbcr_el1_name = g_strdup_printf("DBGBCR%d_EL1", i);
         ARMCPRegInfo dbgregs[] = {
-            { .name = "DBGBVR", .state = ARM_CP_STATE_BOTH,
+            { .name = dbgbvr_el1_name, .state = ARM_CP_STATE_BOTH,
               .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = i, .opc2 = 4,
               .access = PL1_RW, .accessfn = access_tda,
               .fieldoffset = offsetof(CPUARMState, cp15.dbgbvr[i]),
               .writefn = dbgbvr_write, .raw_writefn = raw_write
             },
-            { .name = "DBGBCR", .state = ARM_CP_STATE_BOTH,
+            { .name = dbgbcr_el1_name, .state = ARM_CP_STATE_BOTH,
               .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = i, .opc2 = 5,
               .access = PL1_RW, .accessfn = access_tda,
               .fieldoffset = offsetof(CPUARMState, cp15.dbgbcr[i]),
@@ -6558,17 +6560,21 @@ static void define_debug_regs(ARMCPU *cpu)
             },
         };
         define_arm_cp_regs(cpu, dbgregs);
+        g_free(dbgbvr_el1_name);
+        g_free(dbgbcr_el1_name);
     }
 
     for (i = 0; i < wrps; i++) {
+        char *dbgwvr_el1_name = g_strdup_printf("DBGWVR%d_EL1", i);
+        char *dbgwcr_el1_name = g_strdup_printf("DBGWCR%d_EL1", i);
         ARMCPRegInfo dbgregs[] = {
-            { .name = "DBGWVR", .state = ARM_CP_STATE_BOTH,
+            { .name = dbgwvr_el1_name, .state = ARM_CP_STATE_BOTH,
               .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = i, .opc2 = 6,
               .access = PL1_RW, .accessfn = access_tda,
               .fieldoffset = offsetof(CPUARMState, cp15.dbgwvr[i]),
               .writefn = dbgwvr_write, .raw_writefn = raw_write
             },
-            { .name = "DBGWCR", .state = ARM_CP_STATE_BOTH,
+            { .name = dbgwcr_el1_name, .state = ARM_CP_STATE_BOTH,
               .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = i, .opc2 = 7,
               .access = PL1_RW, .accessfn = access_tda,
               .fieldoffset = offsetof(CPUARMState, cp15.dbgwcr[i]),
@@ -6576,6 +6582,8 @@ static void define_debug_regs(ARMCPU *cpu)
             },
         };
         define_arm_cp_regs(cpu, dbgregs);
+        g_free(dbgwvr_el1_name);
+        g_free(dbgwcr_el1_name);
     }
 }
 
-- 
2.20.1 (Apple Git-117)

On Thu, 12 May 2022 at 10:42, Chris Howard <cvz185@web.de> wrote:
>
> From 5de17d5aacb9cf21de4c9736b227b0498c607709 Mon Sep 17 00:00:00 2001
> From: CHRIS HOWARD <cvz185@web.de>
> Date: Thu, 12 May 2022 11:35:17 +0200
> Subject: [PATCH] Fix aarch64 debug register names.
>
> Signed-off-by: CHRIS HOWARD <cvz185@web.de>

Thanks for sending the patch -- I've applied it
to target-arm.next.

-- PMM

On 5/12/22 02:42, Chris Howard wrote:
>  From 5de17d5aacb9cf21de4c9736b227b0498c607709 Mon Sep 17 00:00:00 2001
> From: CHRIS HOWARD <cvz185@web.de>
> Date: Thu, 12 May 2022 11:35:17 +0200
> Subject: [PATCH] Fix aarch64 debug register names.
> 
> Signed-off-by: CHRIS HOWARD <cvz185@web.de>
> ---
>   target/arm/helper.c | 16 ++++++++++++----
>   1 file changed, 12 insertions(+), 4 deletions(-)
> 
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 432bd81919..0dd97cb905 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -6543,14 +6543,16 @@ static void define_debug_regs(ARMCPU *cpu)
>       }
>   
>       for (i = 0; i < brps; i++) {
> +        char *dbgbvr_el1_name = g_strdup_printf("DBGBVR%d_EL1", i);
> +        char *dbgbcr_el1_name = g_strdup_printf("DBGBCR%d_EL1", i);
>           ARMCPRegInfo dbgregs[] = {
> -            { .name = "DBGBVR", .state = ARM_CP_STATE_BOTH,
> +            { .name = dbgbvr_el1_name, .state = ARM_CP_STATE_BOTH,
>                 .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = i, .opc2 = 4,
>                 .access = PL1_RW, .accessfn = access_tda,
>                 .fieldoffset = offsetof(CPUARMState, cp15.dbgbvr[i]),
>                 .writefn = dbgbvr_write, .raw_writefn = raw_write
>               },
> -            { .name = "DBGBCR", .state = ARM_CP_STATE_BOTH,
> +            { .name = dbgbcr_el1_name, .state = ARM_CP_STATE_BOTH,
>                 .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = i, .opc2 = 5,
>                 .access = PL1_RW, .accessfn = access_tda,
>                 .fieldoffset = offsetof(CPUARMState, cp15.dbgbcr[i]),
> @@ -6558,17 +6560,21 @@ static void define_debug_regs(ARMCPU *cpu)
>               },
>           };
>           define_arm_cp_regs(cpu, dbgregs);
> +        g_free(dbgbvr_el1_name);
> +        g_free(dbgbcr_el1_name);

If you felt like doing another revision, using g_autofree on the declaration would be 
preferred.  However,

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~