v83 and v85 introduce new ISA extensions:
- CFI/restricted branches
- scalar atomic operations
- scalar float operations
- trap2 instruction
- vector stack, used by HLX
The HLX vector coprocessor, also introduced by these new revisions, is
not included in this series.
The cross-toolchain doesn't yet support these opcodes. So in our tests,
we've manually encoded the instructions using ".word" directives and we
invoke the tests with the explicit '-cpu'. The directives will be replaced
with the mnemonics and explicit '-cpu' removed once the assembler has the
necessary support. I expect LLVM 24.x will include these instructions.
In v4:
- add r0 to the clobbers list in "tests/tcg/hexagon: add v85 scalar tests"
- call gen_framecheck() from fGEN_TCG_V2_CHECK_AND_WRITE_VSP()
In v3:
- Add `HEX_EVENT_TRAP2` definition and corresponding changes for trap2, which
was incorrectly mapped to trap1.
- CFI fixes: bugs in corner cases; landing pad + restricted branch in
the same packet (moved marker update to packet start), TLB miss w/CFI fault
in the same packet (moved CFI active state write before process_store_log()),
- atomics test: s/uint64_t/uint32_t/ - v85_atomic_inc operates on one word.
- vallocframe.c: add test_write_vsp_clobber() regression test, which keeps a
value live across write_vsp() to catch a missing r0 clobber.
In v2:
- S2_allocframe_rb moved out of the atomics commit into the CFI commit,
after A_RESTRICT_TARGET is declared.
- fix for no-idef: fGEN_TCG_V2_v{,de}allocframe_* overrides are kept in the
vector-frame commit. S2_allocframe_rb and SS2_allocframe_rb overrides were added
to the CFI commit.
- Squashed patches 6 and 7
- fixed 'in_asm' for L4_loadw_phys: generalized w/an encoding_supported()
check.
- Switched to gen_unalias_gpr_src in gen_callr
- Added comment on the .word encoding to explain the instruction.
- Dropped the -O0 for cfi_user.c
v3: https://lore.kernel.org/qemu-devel/20261021224421.3786109-1-brian.cain@oss.qualcomm.com/
v2: https://lore.kernel.org/qemu-devel/20261019172603.2625677-1-brian.cain@oss.qualcomm.com/
v1: https://lore.kernel.org/qemu-devel/20261014195223.3233623-1-brian.cain@oss.qualcomm.com/
Brian Cain (11):
target/hexagon: sort tag_rev_info entries by version
Hexagon: add v85 CPU model
hw/hexagon: add v85 machines
linux-user/hexagon: report ISA HWCAP through v85
target/hexagon: add v85 scalar atomics
target/hexagon: add v83 trap2 and vector stack instructions
target/hexagon: reject reserved L4_loadw_phys encoding from v83
target/hexagon: preserve callr target when Rs is LR
target/hexagon: implement control flow integrity (CFI)
target/hexagon: add vsf* instructions
tests/tcg/hexagon: add v85 scalar tests
docs/system/hexagon/emulation.rst | 2 +-
include/hw/hexagon/hexagon.h | 6 +-
linux-user/hexagon/target_elf.h | 2 +
target/hexagon/cpu-qom.h | 4 +
target/hexagon/cpu.h | 3 +
target/hexagon/cpu_bits.h | 3 +
target/hexagon/decode.h | 2 +
target/hexagon/gen_tcg.h | 124 +++++++++++++-
target/hexagon/gen_tcg_sys.h | 6 +
target/hexagon/genptr.h | 12 ++
target/hexagon/helper.h | 5 +
target/hexagon/hex_regs.h | 2 +
target/hexagon/idef-parser/parser-helpers.h | 1 +
target/hexagon/macros.h | 12 ++
target/hexagon/translate.h | 4 +
tests/tcg/hexagon/cfi_tgts.h | 18 ++
hw/hexagon/machine_cfg_v85na_1.h.inc | 50 ++++++
hw/hexagon/machine_cfg_v85qa_1.h.inc | 51 ++++++
target/hexagon/attribs_def.h.inc | 2 +
target/hexagon/reg_fields_def.h.inc | 1 +
hw/hexagon/hexagon_dsp.c | 48 +++++-
linux-user/hexagon/cpu_loop.c | 14 ++
linux-user/hexagon/elfload.c | 10 ++
linux-user/hexagon/signal.c | 8 +
target/hexagon/cpu.c | 10 +-
target/hexagon/decode.c | 20 +++
target/hexagon/genptr.c | 91 ++++++++++
target/hexagon/hex_interrupts.c | 3 +
target/hexagon/hexswi.c | 36 +++-
target/hexagon/iclass.c | 1 +
target/hexagon/idef-parser/parser-helpers.c | 14 ++
target/hexagon/machine.c | 3 +-
target/hexagon/op_helper.c | 73 ++++++++
target/hexagon/printinsn.c | 3 +-
target/hexagon/translate.c | 61 ++++++-
tests/tcg/hexagon/atomics.c | 111 ++++++++++++
tests/tcg/hexagon/cfi_tlb.c | 99 +++++++++++
tests/tcg/hexagon/cfi_user.c | 73 ++++++++
tests/tcg/hexagon/check_rev_gating.c | 10 ++
tests/tcg/hexagon/invalid-encoding.c | 20 +++
tests/tcg/hexagon/trap2.c | 34 ++++
tests/tcg/hexagon/v83_scalar_fp.c | 98 +++++++++++
tests/tcg/hexagon/vallocframe.c | 130 ++++++++++++++
target/hexagon/tag_rev_info.c.inc | 82 +++++++--
target/hexagon/gen_idef_parser_funcs.py | 4 +-
target/hexagon/idef-parser/idef-parser.lex | 8 +
target/hexagon/idef-parser/idef-parser.y | 9 +-
target/hexagon/imported/alu.idef | 3 +
target/hexagon/imported/branch.idef | 38 +++++
target/hexagon/imported/encode_pp.def | 43 ++++-
target/hexagon/imported/encode_subinsn.def | 1 +
target/hexagon/imported/float.idef | 49 ++++++
target/hexagon/imported/ldst.idef | 16 +-
target/hexagon/imported/macros.def | 10 ++
target/hexagon/imported/subinsns.idef | 2 +
target/hexagon/imported/system.idef | 9 +
tests/tcg/hexagon/cfi_tgts.S | 178 ++++++++++++++++++++
tests/tcg/hexagon/meson.build | 24 ++-
58 files changed, 1723 insertions(+), 33 deletions(-)
create mode 100644 tests/tcg/hexagon/cfi_tgts.h
create mode 100644 hw/hexagon/machine_cfg_v85na_1.h.inc
create mode 100644 hw/hexagon/machine_cfg_v85qa_1.h.inc
create mode 100644 tests/tcg/hexagon/cfi_tlb.c
create mode 100644 tests/tcg/hexagon/cfi_user.c
create mode 100644 tests/tcg/hexagon/trap2.c
create mode 100644 tests/tcg/hexagon/v83_scalar_fp.c
create mode 100644 tests/tcg/hexagon/vallocframe.c
create mode 100644 tests/tcg/hexagon/cfi_tgts.S
--
2.34.1