This series introduces the minimal SoC and machine foundation for supporting
the Raspberry Pi Pico (RP2040) and its Arm Cortex-M0+ core. It reuses the work
originally presented in RFC by Alex Bennee in 2022 [1], but has been fully
adapted to current QEMU APIs and split into focused, reviewable pieces.
The Armv6-M MPU series [2] and the follow-up privilege extension patch [3] are
now upstream. As requested by Peter Maydell, the cortex-m0plus CPU type,
previously submitted as a standalone patch [4], is now the first patch of this
series, together with the machine that uses it. Its initialization has been
made fully autonomous, with no call to cortex_m0_initfn(), as requested in that
review.
The remaining patches build a minimal but functional RP2040 SoC and Raspberry
Pi Pico machine, sufficient to run minimal firmware (ELF loaded via -kernel)
and execute the initial boot sequence, though it does not yet emulate the
RP2040 mask ROM. They include:
cortex-m0plus CPU type - explicit architectural initialization.
Common RP2040 peripheral definitions - shared constants and helper for APB
atomic alias windows.
RP2040 SoC and Raspberry Pi Pico machine - basic skeleton with UART, flash,
RAM, and minimal interconnect.
TCG smoke tests (patch 4): basic boot test (ELF load, reset vector, UART
output). MPU validation tests (patch 5): TCG-level checks for Cortex-M0+
MPU regions. Supporting peripherals (patches 6-9): SYSINFO, SYSCFG, VREG, and
TBMAN (testbench manager).
At the end of this series, the machine can:
Boot from QEMU's -kernel with an ELF firmware;
Execute code in RAM or via a simple ROM-mapped XIP window (before full XIP/SSI
and pinmux models are added);
Output via UART0 (PL011, directly connected, before pin multiplexing is
implemented);
Validate the Cortex-M0+ MPU via TCG tests.
What remains outside this series (and will be submitted separately) is:
Clocking (clksrc, xosc, pll),
GPIO controller and SIO (including interrupt handling),
XIP controller and flash interface,
DMA engine,
ROM service stubs (e.g., rom_pio_clock, rom_flash_exit_xip).
These components are necessary to extend this minimal boot foundation into a
more complete and functionally accurate RP2040 model.
Patch statistics
configs/devices/arm-softmmu/default.mak | 1 +
hw/arm/Kconfig | 12 +
hw/arm/meson.build | 2 +
hw/arm/raspi_pico.c | 83 +++++++
hw/arm/rp2040.c | 330 +++++++++++++++++++++++++++
hw/misc/meson.build | 4 +
hw/misc/rp2040_syscfg.c | 220 ++++++++++++++++++
hw/misc/rp2040_sysinfo.c | 102 +++++++++
hw/misc/rp2040_tbman.c | 88 ++++++++
hw/misc/rp2040_vreg.c | 149 +++++++++++++
include/hw/arm/rp2040.h | 62 ++++++
include/hw/misc/rp2040.h | 32 +++
include/hw/misc/rp2040_syscfg.h | 41 ++++
include/hw/misc/rp2040_sysinfo.h | 25 +++
include/hw/misc/rp2040_tbman.h | 29 +++
include/hw/misc/rp2040_vreg.h | 46 ++++
target/arm/tcg/cpu-v7m.c | 33 +++
tests/qtest/meson.build | 5 +
tests/qtest/rp2040-syscfg-test.c | 97 ++++++++
tests/qtest/rp2040-sysinfo-test.c | 37 ++++
tests/qtest/rp2040-tbman-test.c | 29 +++
tests/qtest/rp2040-vreg-test.c | 79 +++++++
tests/tcg/arm/system/meson.build | 19 ++
tests/tcg/arm/system/rp2040-boot.S | 30 +++
tests/tcg/arm/system/rp2040-minimal.ld | 40 ++++
tests/tcg/arm/system/rp2040-mpu.S | 356 ++++++++++++++++++++++++++++++
tests/tcg/arm/system/rp2040-mpu.ref | 10 +
tests/tcg/arm/system/rp2040-uart.S | 53 +++++
tests/tcg/arm/system/rp2040-uart.ref | 1 +
29 files changed, 2015 insertions(+)
[1] https://lore.kernel.org/qemu-devel/20220110175104.2908956-1-alex.bennee@linaro.org/
[2] https://lore.kernel.org/qemu-devel/20260914192323.29250-1-gilles.grimaud@univ-lille.fr/
[3] https://lore.kernel.org/qemu-devel/20260920220722.73501-1-gilles.grimaud@univ-lille.fr/
[4] https://lore.kernel.org/qemu-devel/20260930094603.35969-1-gilles.grimaud@univ-lille.fr/