target/loongarch: Add dynamic irq_nr field

[PATCH] target/loongarch: Add dynamic irq_nr field

Posted by Bibo Mao 1 week, 3 days ago

By default, the number of IRQs on the CPU side is N_IRQS. It will become
N_IRQS * 2 if LVZ is enabled in the future. This patch adds a
CPUArchState::irq_nr field to record the supported IRQ count.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/cpu.c | 8 +++++---
 target/loongarch/cpu.h | 1 +
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 54c2699897..9cf566f0f6 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -88,8 +88,9 @@ void loongarch_cpu_set_irq(void *opaque, int irq, int level)
 {
     LoongArchCPU *cpu = opaque;
     CPUState *cs = CPU(cpu);
+    CPULoongArchState *env = &cpu->env;
 
-    if (irq < 0 || irq >= N_IRQS) {
+    if (irq < 0 || irq >= env->irq_nr) {
         return;
     }
 
@@ -724,12 +725,13 @@ static void loongarch_cpu_init(Object *obj)
 {
 #ifndef CONFIG_USER_ONLY
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-#ifdef CONFIG_TCG
     CPULoongArchState *env = &cpu->env;
+#ifdef CONFIG_TCG
     CPUTimerState *timer;
 #endif
 
-    qdev_init_gpio_in(DEVICE(cpu), loongarch_cpu_set_irq, N_IRQS);
+    env->irq_nr = N_IRQS;
+    qdev_init_gpio_in(DEVICE(cpu), loongarch_cpu_set_irq, env->irq_nr);
 #ifdef CONFIG_TCG
     timer = env_timer(env);
     timer->irq = IRQ_TIMER;
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index c592f69885..77ea8f03f9 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -437,6 +437,7 @@ typedef struct CPUArchState {
     uint32_t mp_state;
 #endif
     CPUSysState *sys_state;
+    unsigned int irq_nr;
 } CPULoongArchState;
 
 typedef struct LoongArchCPUTopo {

base-commit: 615ece3c406b262996e569f29ea6eed0d81c4d8d
-- 
2.54.0

Re: [PATCH] target/loongarch: Add dynamic irq_nr field

Posted by lixianglai 15 hours ago

Reviewed-by:  Xianglai Li <lixianglai@loongson.cn>

> By default, the number of IRQs on the CPU side is N_IRQS. It will become
> N_IRQS * 2 if LVZ is enabled in the future. This patch adds a
> CPUArchState::irq_nr field to record the supported IRQ count.
>
> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
> ---
>   target/loongarch/cpu.c | 8 +++++---
>   target/loongarch/cpu.h | 1 +
>   2 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
> index 54c2699897..9cf566f0f6 100644
> --- a/target/loongarch/cpu.c
> +++ b/target/loongarch/cpu.c
> @@ -88,8 +88,9 @@ void loongarch_cpu_set_irq(void *opaque, int irq, int level)
>   {
>       LoongArchCPU *cpu = opaque;
>       CPUState *cs = CPU(cpu);
> +    CPULoongArchState *env = &cpu->env;
>   
> -    if (irq < 0 || irq >= N_IRQS) {
> +    if (irq < 0 || irq >= env->irq_nr) {
>           return;
>       }
>   
> @@ -724,12 +725,13 @@ static void loongarch_cpu_init(Object *obj)
>   {
>   #ifndef CONFIG_USER_ONLY
>       LoongArchCPU *cpu = LOONGARCH_CPU(obj);
> -#ifdef CONFIG_TCG
>       CPULoongArchState *env = &cpu->env;
> +#ifdef CONFIG_TCG
>       CPUTimerState *timer;
>   #endif
>   
> -    qdev_init_gpio_in(DEVICE(cpu), loongarch_cpu_set_irq, N_IRQS);
> +    env->irq_nr = N_IRQS;
> +    qdev_init_gpio_in(DEVICE(cpu), loongarch_cpu_set_irq, env->irq_nr);
>   #ifdef CONFIG_TCG
>       timer = env_timer(env);
>       timer->irq = IRQ_TIMER;
> diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
> index c592f69885..77ea8f03f9 100644
> --- a/target/loongarch/cpu.h
> +++ b/target/loongarch/cpu.h
> @@ -437,6 +437,7 @@ typedef struct CPUArchState {
>       uint32_t mp_state;
>   #endif
>       CPUSysState *sys_state;
> +    unsigned int irq_nr;
>   } CPULoongArchState;
>   
>   typedef struct LoongArchCPUTopo {
>
> base-commit: 615ece3c406b262996e569f29ea6eed0d81c4d8d