After each register write handled by cprman_write, function update_mux
checks each of the clocks to see whether the supplied register index
applies to it, calling clock_mux_update if so. Each clock has two
registers, so it needs to check the base cm_offset for CM_CTL and then
the next slot for CM_DIV. But, it was checking for cm_offset plus 4, as
though it were a byte offset when it's a logical index.

Signed-off-by: Jonathan Gilbert <logic@deltaq.org>
---
 hw/misc/bcm2835_cprman.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
index 8220f7a6b4..f9a77ff9bb 100644
--- a/hw/misc/bcm2835_cprman.c
+++ b/hw/misc/bcm2835_cprman.c
@@ -508,7 +508,7 @@ static inline void update_mux_from_cm(BCM2835CprmanState *s, size_t idx)
 
     for (i = 0; i < CPRMAN_NUM_CLOCK_MUX; i++) {
         if ((CLOCK_MUX_INIT_INFO[i].cm_offset == idx) ||
-            (CLOCK_MUX_INIT_INFO[i].cm_offset + 4 == idx)) {
+            (CLOCK_MUX_INIT_INFO[i].cm_offset + 1 == idx)) {
             /* matches CM_CTL or CM_DIV mux register */
             clock_mux_update(&s->clock_muxes[i]);
             return;
-- 
2.53.0

Cc'ing Luc

On 25/9/26 12:07, Jonathan Gilbert wrote:
> After each register write handled by cprman_write, function update_mux
> checks each of the clocks to see whether the supplied register index
> applies to it, calling clock_mux_update if so. Each clock has two
> registers, so it needs to check the base cm_offset for CM_CTL and then
> the next slot for CM_DIV. But, it was checking for cm_offset plus 4, as
> though it were a byte offset when it's a logical index.
> 
> Signed-off-by: Jonathan Gilbert <logic@deltaq.org>
> ---
>   hw/misc/bcm2835_cprman.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
> index 8220f7a6b4..f9a77ff9bb 100644
> --- a/hw/misc/bcm2835_cprman.c
> +++ b/hw/misc/bcm2835_cprman.c
> @@ -508,7 +508,7 @@ static inline void update_mux_from_cm(BCM2835CprmanState *s, size_t idx)
>   
>       for (i = 0; i < CPRMAN_NUM_CLOCK_MUX; i++) {
>           if ((CLOCK_MUX_INIT_INFO[i].cm_offset == idx) ||
> -            (CLOCK_MUX_INIT_INFO[i].cm_offset + 4 == idx)) {
> +            (CLOCK_MUX_INIT_INFO[i].cm_offset + 1 == idx)) {
>               /* matches CM_CTL or CM_DIV mux register */
>               clock_mux_update(&s->clock_muxes[i]);
>               return;

On 26/9/26 11:30, Philippe Mathieu-Daudé wrote:
> Cc'ing Luc
> 
> On 25/9/26 12:07, Jonathan Gilbert wrote:
>> After each register write handled by cprman_write, function update_mux
>> checks each of the clocks to see whether the supplied register index
>> applies to it, calling clock_mux_update if so. Each clock has two
>> registers, so it needs to check the base cm_offset for CM_CTL and then
>> the next slot for CM_DIV. But, it was checking for cm_offset plus 4, as
>> though it were a byte offset when it's a logical index.
>>

Fixes: 7281362484a ("hw/misc/bcm2835_cprman: clock mux skeleton 
implementation")
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

>> Signed-off-by: Jonathan Gilbert <logic@deltaq.org>
>> ---
>>   hw/misc/bcm2835_cprman.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
>> index 8220f7a6b4..f9a77ff9bb 100644
>> --- a/hw/misc/bcm2835_cprman.c
>> +++ b/hw/misc/bcm2835_cprman.c
>> @@ -508,7 +508,7 @@ static inline void 
>> update_mux_from_cm(BCM2835CprmanState *s, size_t idx)
>>       for (i = 0; i < CPRMAN_NUM_CLOCK_MUX; i++) {
>>           if ((CLOCK_MUX_INIT_INFO[i].cm_offset == idx) ||
>> -            (CLOCK_MUX_INIT_INFO[i].cm_offset + 4 == idx)) {
>> +            (CLOCK_MUX_INIT_INFO[i].cm_offset + 1 == idx)) {
>>               /* matches CM_CTL or CM_DIV mux register */
>>               clock_mux_update(&s->clock_muxes[i]);
>>               return;
> 
>