The following changes since commit 209b2afaface001c7d4d981e38f186afe7b24a50:
Merge tag 'pull-parallels-2026-09-11' of https://gitlab.com/dlunev/qemu into staging (2026-09-10 22:02:18 -1000)
are available in the Git repository at:
https://github.com/qualcomm/qemu tags/pull-hex-20260911
for you to fetch changes up to 8acc03787bd602dec74c0169cf8cf232356eedbd:
docs: Correct semihost spec URL (2026-09-11 07:29:10 -0700)
----------------------------------------------------------------
Hexagon: v81 support
Initial support for v81, scalar only for now. HVX support
to follow.
Adds new machine definitions, v81 system architecture changes,
new scalar opcodes.
----------------------------------------------------------------
Brian Cain (10):
target/hexagon: add the v75, v79 and v81 CPU models
target/hexagon: add the v73 J2_unpause scalar instruction
target/hexagon: add the v79 instructions
target/hexagon: add Y2_tlbpp as unimplemented
hw/hexagon: add the V81DGB_1 and V81QA_1 machines
hw/hexagon: move "sim" alias to "V81QA_1"
target/hexagon: widen v81 CPU masks
target/hexagon: add v81 interrupt registers
tests/functional: cover v81 system registers
docs: Correct semihost spec URL
docs/system/target-hexagon.rst | 2 +-
include/hw/hexagon/hexagon.h | 11 ++
target/hexagon/cpu-qom.h | 6 ++
target/hexagon/cpu.h | 4 +-
target/hexagon/hex_regs.h | 42 ++++++++
target/hexagon/sys_macros.h | 11 +-
hw/hexagon/machine_cfg_v81dgb_1.h.inc | 73 +++++++++++++
hw/hexagon/machine_cfg_v81qa_1.h.inc | 73 +++++++++++++
target/hexagon/attribs_def.h.inc | 3 +
target/hexagon/reg_fields_def.h.inc | 10 +-
hw/hexagon/hexagon_dsp.c | 48 ++++++++-
hw/hexagon/hexagon_globalreg.c | 10 ++
linux-user/hexagon/elfload.c | 6 ++
target/hexagon/cpu.c | 14 ++-
target/hexagon/cpu_helper.c | 15 ++-
target/hexagon/genptr.c | 8 +-
target/hexagon/hex_interrupts.c | 141 +++++++++++++++++--------
target/hexagon/op_helper.c | 58 ++++++----
target/hexagon/translate.c | 8 +-
tests/tcg/hexagon/check_rev_gating.c | 32 +++++-
tests/tcg/hexagon/v73_scalar.c | 7 ++
tests/tcg/hexagon/v79_scalar.c | 157 ++++++++++++++++++++++++++++
target/hexagon/tag_rev_info.c.inc | 30 +++++-
target/hexagon/imported/encode_pp.def | 21 ++++
target/hexagon/imported/ldst.idef | 21 ++++
target/hexagon/imported/system.idef | 7 ++
tests/functional/hexagon/test_arch_tests.py | 21 ++++
tests/tcg/hexagon/meson.build | 1 +
28 files changed, 753 insertions(+), 87 deletions(-)
create mode 100644 hw/hexagon/machine_cfg_v81dgb_1.h.inc
create mode 100644 hw/hexagon/machine_cfg_v81qa_1.h.inc
create mode 100644 tests/tcg/hexagon/v79_scalar.c