[RFC PATCH v2 0/5] hw/arm/virt: Add support for Target Implementation CPUs

Shameer Kolothum posted 5 patches 2 weeks, 1 day ago
Failed in applying to current master (apply log)
docs/system/arm/virt.rst |  22 +++++
qapi/misc-arm.json       |  36 ++++++++
include/hw/arm/virt.h    |   2 +
target/arm/kvm-consts.h  |  48 ++++++++++
target/arm/kvm_arm.h     |  18 ++++
hw/arm/virt.c            |  48 ++++++++++
target/arm/kvm-stub.c    |  10 ++
target/arm/kvm.c         | 194 +++++++++++++++++++++++++++++++++++++++
8 files changed, 378 insertions(+)
[RFC PATCH v2 0/5] hw/arm/virt: Add support for Target Implementation CPUs
Posted by Shameer Kolothum 2 weeks, 1 day ago
Hi,

Changes from RFC v1:
https://lore.kernel.org/qemu-devel/20250801074730.28329-1-shameerkolothum@gmail.com/

 -Rebased on top of Connie/Eric's "customizable aarch64 KVM host" series v8[0]
 -Addressed feedback on v1.

One item from v1 is still open: What should actually set the
implementation ID registers(Sebastian raised this on v1).

As it stands, this series enables KVM_CAP_ARM_WRITABLE_IMP_ID_REGS
but never writes MIDR/REVIDR/AIDR. impl-cpu feeds the hypercall only,
so a guest that reads MIDR_EL1 directly still sees the host value, while
DISCOVER_IMPL_CPUS reports the configured list. Sebastian suggested
using target_impl_cpus[0].*, which would make the guest-visible CPU
identity a configuration value rather than an artefact of whichever host
the VM first booted on.

Please take a look and let me know.

Thanks,
Shameer

[0] https://lore.kernel.org/qemu-devel/20260826093747.1670077-1-eric.auger@redhat.com/

From v1:

On ARM64 platforms, many errata workarounds are based on CPU identification
registers, particularly MIDR_EL1 and REVIDR_EL1. Some of these errata
require corresponding fixes in the guest kernel as well. This becomes a
challenge during guest migration between hosts with different MIDR/REVIDR
values, even when the VMM provides a common baseline feature set using
the recently introduced writable ID register support.

To address this, the Linux kernel now provides:

 -A mechanism to expose implementation CPU data to guests via KVM
  hypercalls:

  ARM_SMCCC_VENDOR_HYP_KVM_DISCOVER_IMPL_VER_FUNC_ID
  ARM_SMCCC_VENDOR_HYP_KVM_DISCOVER_IMPL_CPUS_FUNC_ID

 -A way to override implementation ID registers (MIDR, REVIDR, AIDR),
  which were previously treated as invariant.

What this RFC does:

This RFC enables the virt machine to specify Target Implementation CPUs
via QEMU command-line, exposing them to the guest via KVM hypercalls.

Example use case (hosts with differing MIDRs):

./qemu-system-aarch64 -machine virt,gic-version=3 \
  -enable-kvm \
  -bios QEMU_EFI.fd \
  -m 1G -smp cpus=4,maxcpus=4 \
  -cpu host \
  -M impl-cpu.0.midr=0x481fd010,impl-cpu.0.revidr=0,impl-cpu.0.aidr=0x551,\
   impl-cpu.1.midr=0x481fd011,impl-cpu.1.revidr=0,impl-cpu.1.aidr=0x551 \
  -kernel Image-6.16-rc2 \
  -initrd rootfs-iperf.cpio \
  -append "rdinit=init console=ttyAMA0 root=/dev/vda rw earlycon=pl011,0x9000000 kpti=off" \
  -net none \
  -nographic

Shameer Kolothum (5):
  target/arm/kvm-consts.h: Add SMCCC vendor hypercall definitions
  target/arm/kvm: Introduce helper to check target impl CPU support
  target/arm/kvm: Add QAPI struct ArmTargetImplCPU
  target/arm/kvm: Handle KVM Target Imp CPU hypercalls
  hw/arm/virt: Add Target Implementation CPU support

 docs/system/arm/virt.rst |  22 +++++
 qapi/misc-arm.json       |  36 ++++++++
 include/hw/arm/virt.h    |   2 +
 target/arm/kvm-consts.h  |  48 ++++++++++
 target/arm/kvm_arm.h     |  18 ++++
 hw/arm/virt.c            |  48 ++++++++++
 target/arm/kvm-stub.c    |  10 ++
 target/arm/kvm.c         | 194 +++++++++++++++++++++++++++++++++++++++
 8 files changed, 378 insertions(+)

-- 
2.43.0