target/riscv/kvm: Fix a few migration issues

[PATCH 0/3] target/riscv/kvm: Fix a few migration issues

Xie Bo posted 3 patches 3 weeks, 5 days ago

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Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260831074106.1798671-1-xb@ultrarisc.com

Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Chao Liu <chao.liu@processmission.com>

target/riscv/cpu.h           |  4 ++
target/riscv/kvm/kvm-cpu.c   | 74 +++++++++++++++++++++++++++---------
target/riscv/kvm/kvm_riscv.h |  1 +
target/riscv/machine.c       | 58 ++++++++++++++++++++++++++++
4 files changed, 119 insertions(+), 18 deletions(-)

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[PATCH 0/3] target/riscv/kvm: Fix a few migration issues

Posted by Xie Bo 3 weeks, 5 days ago

Hi,

Here are three RISC-V KVM migration fixes I found while testing live
migration.

The first patch fixes FCSR migration.  The second makes the existing
timer-frequency restriction effective by rejecting migration between
hosts with different frequencies.  While checking the vector register
code, I also noticed that vcsr was not synchronized.

I tested KVM and non-KVM builds.  On the RISC-V host, a four-vCPU guest
kept running after migration and FCSR was preserved.  Migration from a
10 MHz source to a destination reporting 11 MHz was rejected.

The test host does not have the V extension, so I could only
compile-test the last patch.

Thanks,
Bo

Xie Bo (3):
  target/riscv/kvm: Preserve FCSR across migration
  target/riscv/kvm: Reject migration with a different timer frequency
  target/riscv/kvm: Preserve VCSR across migration

 target/riscv/cpu.h           |  4 ++
 target/riscv/kvm/kvm-cpu.c   | 74 +++++++++++++++++++++++++++---------
 target/riscv/kvm/kvm_riscv.h |  1 +
 target/riscv/machine.c       | 58 ++++++++++++++++++++++++++++
 4 files changed, 119 insertions(+), 18 deletions(-)


base-commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475
-- 
2.17.1

Re: [PATCH 0/3] target/riscv/kvm: Fix a few migration issues

Posted by Alistair Francis 1 day, 15 hours ago

On Mon, 2026-08-31 at 15:41 +0800, Xie Bo wrote:
> Hi,
> 
> Here are three RISC-V KVM migration fixes I found while testing live
> migration.
> 
> The first patch fixes FCSR migration.  The second makes the existing
> timer-frequency restriction effective by rejecting migration between
> hosts with different frequencies.  While checking the vector register
> code, I also noticed that vcsr was not synchronized.
> 
> I tested KVM and non-KVM builds.  On the RISC-V host, a four-vCPU
> guest
> kept running after migration and FCSR was preserved.  Migration from
> a
> 10 MHz source to a destination reporting 11 MHz was rejected.
> 
> The test host does not have the V extension, so I could only
> compile-test the last patch.
> 
> Thanks,
> Bo
> 
> Xie Bo (3):
>   target/riscv/kvm: Preserve FCSR across migration
>   target/riscv/kvm: Reject migration with a different timer frequency
>   target/riscv/kvm: Preserve VCSR across migration

Thanks!

Applied to riscv-to-apply.next

Alistair

> 
>  target/riscv/cpu.h           |  4 ++
>  target/riscv/kvm/kvm-cpu.c   | 74 +++++++++++++++++++++++++++-------
> --
>  target/riscv/kvm/kvm_riscv.h |  1 +
>  target/riscv/machine.c       | 58 ++++++++++++++++++++++++++++
>  4 files changed, 119 insertions(+), 18 deletions(-)
> 
> 
> base-commit: d2e570cc0f97b936902a5b1b86b73c0f5998b475