target/mips: Use tcg_gen_lea() for [D]LSA and MXU S32LD*V opcodes

[PATCH] target/mips: Use tcg_gen_lea() for [D]LSA and MXU S32LD*V opcodes

Philippe Mathieu-Daudé posted 1 patch 3 weeks, 5 days ago

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Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260831062630.58771-1-philmd@oss.qualcomm.com

Maintainers: "Philippe Mathieu-Daudé" <philmd@mailo.com>, Aurelien Jarno <aurelien@aurel32.net>, Jiaxun Yang <jiaxun.yang@flygoat.com>, Aleksandar Rikalo <arikalo@gmail.com>

target/mips/tcg/mxu_translate.c        | 3 +--
target/mips/tcg/translate_addr_const.c | 6 ++----
2 files changed, 3 insertions(+), 6 deletions(-)

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[PATCH] target/mips: Use tcg_gen_lea() for [D]LSA and MXU S32LD*V opcodes

Posted by Philippe Mathieu-Daudé 3 weeks, 5 days ago

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
Based-on: <20260828224451.1564072-1-richard.henderson@linaro.org>
---
 target/mips/tcg/mxu_translate.c        | 3 +--
 target/mips/tcg/translate_addr_const.c | 6 ++----
 2 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/target/mips/tcg/mxu_translate.c b/target/mips/tcg/mxu_translate.c
index 7961b073144..05074476efd 100644
--- a/target/mips/tcg/mxu_translate.c
+++ b/target/mips/tcg/mxu_translate.c
@@ -1601,8 +1601,7 @@ static void gen_mxu_s32ldxvx(DisasContext *ctx, bool reversed,
 
     gen_load_gpr(t0, Rb);
     gen_load_gpr(t1, Rc);
-    tcg_gen_shli_i32(t1, t1, strd2);
-    tcg_gen_add_i32(t0, t0, t1);
+    tcg_gen_lea_i32(t0, t0, t1, strd2, 0);
 
     tcg_gen_qemu_ld_i32(t1, t0, ctx->mem_idx,
                        MO_SL | mo_endian_rev(ctx, reversed) |
diff --git a/target/mips/tcg/translate_addr_const.c b/target/mips/tcg/translate_addr_const.c
index 1d140e918da..910177e43bc 100644
--- a/target/mips/tcg/translate_addr_const.c
+++ b/target/mips/tcg/translate_addr_const.c
@@ -26,8 +26,7 @@ bool gen_lsa(DisasContext *ctx, int rd, int rt, int rs, int sa)
     t1 = tcg_temp_new();
     gen_load_gpr(t0, rs);
     gen_load_gpr(t1, rt);
-    tcg_gen_shli_tl(t0, t0, sa);
-    tcg_gen_add_tl(cpu_gpr[rd], t0, t1);
+    tcg_gen_lea_tl(cpu_gpr[rd], t1, t0, sa, 0);
     tcg_gen_ext32s_tl(cpu_gpr[rd], cpu_gpr[rd]);
     return true;
 }
@@ -47,7 +46,6 @@ bool gen_dlsa(DisasContext *ctx, int rd, int rt, int rs, int sa)
     t1 = tcg_temp_new();
     gen_load_gpr(t0, rs);
     gen_load_gpr(t1, rt);
-    tcg_gen_shli_tl(t0, t0, sa);
-    tcg_gen_add_tl(cpu_gpr[rd], t0, t1);
+    tcg_gen_lea_tl(cpu_gpr[rd], t1, t0, sa, 0);
     return true;
 }
-- 
2.53.0

Re: [PATCH] target/mips: Use tcg_gen_lea() for [D]LSA and MXU S32LD*V opcodes

Posted by Richard Henderson 2 weeks, 1 day ago

On 8/30/26 20:26, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé<philmd@oss.qualcomm.com>
> ---
> Based-on:<20260828224451.1564072-1-richard.henderson@linaro.org>
> ---
>   target/mips/tcg/mxu_translate.c        | 3 +--
>   target/mips/tcg/translate_addr_const.c | 6 ++----
>   2 files changed, 3 insertions(+), 6 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Thanks, I've queued this with the rest of the lea patch set.

r~