[PATCH 00/12] tests/tcg: Multiarch tests for riscv64

Joel Stanley posted 12 patches 1 month ago
Maintainers: Paolo Bonzini <pbonzini@redhat.com>, "Alex Bennée" <alex.bennee@linaro.org>, Peter Maydell <peter.maydell@linaro.org>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Chao Liu <chao.liu@processmission.com>
configure                                 |  11 ++
tests/tcg/riscv64/semicall.h              |  12 +-
tests/tcg/multiarch/system/memory.c       | 113 ++++++++----------
tests/tcg/riscv64/system.c                |  30 +++++
tests/tcg/Makefile.target                 |  10 +-
tests/tcg/aarch64/Makefile.softmmu-target |   3 +-
tests/tcg/riscv64/Makefile.softmmu-target | 134 +++++++++++++---------
tests/tcg/riscv64/boot.S                  |  23 ++++
tests/tcg/riscv64/semihost.ld             |  47 ++++++--
9 files changed, 251 insertions(+), 132 deletions(-)
create mode 100644 tests/tcg/riscv64/system.c
create mode 100644 tests/tcg/riscv64/boot.S
[PATCH 00/12] tests/tcg: Multiarch tests for riscv64
Posted by Joel Stanley 1 month ago
When testing Richard's TCG RVV changes I went down the rabbit hole that
is tests/tcg/multiarch. Out the other side is this series, which enables
the multiarch and record/replay tests for riscv64, and fixes the
memory-sve aarch64 test while adding a memory-rvv test for riscv64.

The first half of the series performs some housekeeping on the semihost
tests and the softmmu makefile in tests/tcg/riscv64. The second half
enables the multiarch tests, and looks at the vectorised memory.c test.

The final patch adds a very coarse check for vectorisation by grepping
objdump for vector loads and stores. Although it's not the neatest, it
would have caught the regression in memory-sve, so it is worthwhile
having in the tree.

Joel Stanley (12):
  tests/tcg/riscv64: Include stdint.h in semicall.h
  tests/tcg/riscv64: Clean up semicall.h inline asm
  tests/tcg/riscv64: Boot semihost tests with -bios none -kernel
  tests/tcg/riscv64: Update semihosting linker script
  tests/tcg/riscv64: Rework rules for semihost tests
  tests/tcg/riscv64: Enable multiarch system tests
  tests/tcg/riscv64: Enable memory record and replay test
  tests/tcg/aarch64: Don't leak memory-sve CFLAGS
  tests/tcg/multiarch: Fix vectorisation of memory test
  tests/tcg/riscv64: Enable vectorised memory test
  configure: Provide OBJDUMP to the tcg tests
  tests/tcg: Check vector memory tests contain vector ops

 configure                                 |  11 ++
 tests/tcg/riscv64/semicall.h              |  12 +-
 tests/tcg/multiarch/system/memory.c       | 113 ++++++++----------
 tests/tcg/riscv64/system.c                |  30 +++++
 tests/tcg/Makefile.target                 |  10 +-
 tests/tcg/aarch64/Makefile.softmmu-target |   3 +-
 tests/tcg/riscv64/Makefile.softmmu-target | 134 +++++++++++++---------
 tests/tcg/riscv64/boot.S                  |  23 ++++
 tests/tcg/riscv64/semihost.ld             |  47 ++++++--
 9 files changed, 251 insertions(+), 132 deletions(-)
 create mode 100644 tests/tcg/riscv64/system.c
 create mode 100644 tests/tcg/riscv64/boot.S

-- 
2.47.3
Re: [PATCH 00/12] tests/tcg: Multiarch tests for riscv64
Posted by Alistair Francis 4 days, 11 hours ago
On Thu, 2026-08-27 at 14:39 +0930, Joel Stanley wrote:
> When testing Richard's TCG RVV changes I went down the rabbit hole
> that
> is tests/tcg/multiarch. Out the other side is this series, which
> enables
> the multiarch and record/replay tests for riscv64, and fixes the
> memory-sve aarch64 test while adding a memory-rvv test for riscv64.
> 
> The first half of the series performs some housekeeping on the
> semihost
> tests and the softmmu makefile in tests/tcg/riscv64. The second half
> enables the multiarch tests, and looks at the vectorised memory.c
> test.
> 
> The final patch adds a very coarse check for vectorisation by
> grepping
> objdump for vector loads and stores. Although it's not the neatest,
> it
> would have caught the regression in memory-sve, so it is worthwhile
> having in the tree.
> 
> Joel Stanley (12):
>   tests/tcg/riscv64: Include stdint.h in semicall.h
>   tests/tcg/riscv64: Clean up semicall.h inline asm
>   tests/tcg/riscv64: Boot semihost tests with -bios none -kernel
>   tests/tcg/riscv64: Update semihosting linker script
>   tests/tcg/riscv64: Rework rules for semihost tests
>   tests/tcg/riscv64: Enable multiarch system tests
>   tests/tcg/riscv64: Enable memory record and replay test
>   tests/tcg/aarch64: Don't leak memory-sve CFLAGS
>   tests/tcg/multiarch: Fix vectorisation of memory test
>   tests/tcg/riscv64: Enable vectorised memory test
>   configure: Provide OBJDUMP to the tcg tests
>   tests/tcg: Check vector memory tests contain vector ops

Urgh! This is all reviewed/acked, but conflicts with the meson test
changes. Do you mind rebasing?

Sorry :(

Alistair

> 
>  configure                                 |  11 ++
>  tests/tcg/riscv64/semicall.h              |  12 +-
>  tests/tcg/multiarch/system/memory.c       | 113 ++++++++----------
>  tests/tcg/riscv64/system.c                |  30 +++++
>  tests/tcg/Makefile.target                 |  10 +-
>  tests/tcg/aarch64/Makefile.softmmu-target |   3 +-
>  tests/tcg/riscv64/Makefile.softmmu-target | 134 +++++++++++++-------
> --
>  tests/tcg/riscv64/boot.S                  |  23 ++++
>  tests/tcg/riscv64/semihost.ld             |  47 ++++++--
>  9 files changed, 251 insertions(+), 132 deletions(-)
>  create mode 100644 tests/tcg/riscv64/system.c
>  create mode 100644 tests/tcg/riscv64/boot.S