[PATCH v2 00/25] target/arm: Implement FEAT_SME2p2 etc

Richard Henderson posted 25 patches 1 month ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260826174213.614571-1-richard.henderson@linaro.org
Maintainers: Warner Losh <imp@bsdimp.com>, Kyle Evans <kevans@freebsd.org>, Peter Maydell <peter.maydell@linaro.org>, Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>, Laurent Vivier <laurent@vivier.eu>, Helge Deller <deller@gmx.de>
bsd-user/aarch64/target_arch_elf.h |   8 +-
target/arm/cpu-features.h          |  33 +++-
target/arm/tcg/helper-a64-defs.h   |   1 +
target/arm/tcg/helper-defs.h       |   5 +
target/arm/tcg/helper-sve-defs.h   |   5 +
linux-user/aarch64/elfload.c       |  13 +-
target/arm/tcg/cpu64.c             |  10 +-
target/arm/tcg/crypto_helper.c     | 164 ++++++++++++++---
target/arm/tcg/sve_helper.c        |   1 +
target/arm/tcg/translate-sme.c     | 190 ++++++++++---------
target/arm/tcg/translate-sve.c     | 282 +++++++++++++++++++++--------
target/arm/tcg/vec_helper64.c      |  35 ++++
docs/system/arm/emulation.rst      |   5 +
target/arm/tcg/sme.decode          | 154 +++++++++++++---
target/arm/tcg/sve.decode          |  70 ++++++-
15 files changed, 732 insertions(+), 244 deletions(-)
[PATCH v2 00/25] target/arm: Implement FEAT_SME2p2 etc
Posted by Richard Henderson 1 month ago
Based-on: 20260825213000.221822-1-richard.henderson@linaro.org
("[PATCH v3 0/4] target/arm: Introduce cpu types max-v8 and max-v9")

Changes for v2:
  - Based on max-v9 split.
  - Minor patch review changes.

r~

Richard Henderson (25):
  target/arm: Split zdn in do_z2z_n1 and do_z2z_n1_fpst
  target/arm: Split zdn in do_z2z_nn and do_z2z_nn_fpst
  target/arm: Split decode of BFloat SME FMAX/FMIN
  target/arm: Implement FMUL (multiple/multiple and single vectors)
  target/arm: Enable FEAT_SVE2p2 and FEAT_SME2p2 for -cpu max
  target/arm: Remove DO_ZPZZ_FP from translate-sme.c
  target/arm: Remove DO_ZPZZ_FP_B16 from translate-sme.c
  target/arm: Remove DO_ZPZZ_AH_FP from translate-sme.c
  target/arm: Remove DO_ZPZZ_AH_FP_B16 from translate-sme.c
  target/arm: Split decode of BFloat SVE FADD, FSUB, FMUL, FMIN*, FMAX*
  target/arm: Implement SVE BFSCALE
  target/arm: Implement SME BFSCALE
  target/arm: Implement SME BFMUL
  target/arm: Enable FEAT_SVE_BFSCALE for -cpu max
  target/arm: Rename isar_feature_aa64_sve_pmull128
  target/arm: Rename isar_feature_aa64_sve_bitperm
  target/arm: Rename isar_feature_aa64_sve_sha3
  target/arm: Rename isar_feature_aa64_sve_sm4
  target/arm: Implement and enable FEAT_SSVE_BitPerm for -cpu max
  target/arm: Implement AESE (indexed)
  target/arm: Implement AESD (indexed)
  target/arm: Implement AESEMC
  target/arm: Implement AESDIMC
  target/arm: Implement PMULL, PMLAL
  target/arm: Enable FEAT_SVE_AES2 for -cpu max

 bsd-user/aarch64/target_arch_elf.h |   8 +-
 target/arm/cpu-features.h          |  33 +++-
 target/arm/tcg/helper-a64-defs.h   |   1 +
 target/arm/tcg/helper-defs.h       |   5 +
 target/arm/tcg/helper-sve-defs.h   |   5 +
 linux-user/aarch64/elfload.c       |  13 +-
 target/arm/tcg/cpu64.c             |  10 +-
 target/arm/tcg/crypto_helper.c     | 164 ++++++++++++++---
 target/arm/tcg/sve_helper.c        |   1 +
 target/arm/tcg/translate-sme.c     | 190 ++++++++++---------
 target/arm/tcg/translate-sve.c     | 282 +++++++++++++++++++++--------
 target/arm/tcg/vec_helper64.c      |  35 ++++
 docs/system/arm/emulation.rst      |   5 +
 target/arm/tcg/sme.decode          | 154 +++++++++++++---
 target/arm/tcg/sve.decode          |  70 ++++++-
 15 files changed, 732 insertions(+), 244 deletions(-)

-- 
2.53.0
Re: [PATCH v2 00/25] target/arm: Implement FEAT_SME2p2 etc
Posted by Peter Maydell 3 weeks, 4 days ago
On Wed, 26 Aug 2026 at 18:42, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Based-on: 20260825213000.221822-1-richard.henderson@linaro.org
> ("[PATCH v3 0/4] target/arm: Introduce cpu types max-v8 and max-v9")
>
> Changes for v2:
>   - Based on max-v9 split.
>   - Minor patch review changes.
>



Applied to target-arm.next, thanks.

-- PMM