This patchset introduces Axiado SoC AX3005 and evaluation board for emulation
The model for Axiado SoC AX3005 supports
4 Cortex-A53 CPUs
Arm Generic Interrupt Controller v3
9 Cadence UARTs
1 SDHCI controller with PHY
8 Cadence GPIOs
Refer Axiado website for more product information
https://axiado.com/products/
and minor changes for the compatibility with existing AX3000 SoC model
Test plan:
1. Verified the machine "ax3005-evb" with following command
qemu-system-aarch64 \
-m 2G \
-machine ax3005-evb \
-device loader,file=bl31.bin,addr=0x88300000 \
-device loader,file=tee-raw.bin,addr=0x88400000 \
-device loader,file=u-boot.bin,addr=0x80000000 \
-device loader,file=fitImage,addr=0x80100000 \
-device loader,file=obmc-phosphor-image-evk-ax3005-qemu.squashfs-xz,addr=0x80B00000 \
-device loader,cpu-num=0,addr=0x88300000 \
-device loader,cpu-num=1,addr=0x88300000 \
-device loader,cpu-num=2,addr=0x88300000 \
-device loader,cpu-num=3,addr=0x88300000 \
-nographic \
-serial null \
-serial null \
-serial null \
-serial mon:stdio \
-drive if=sd,file=obmc-phosphor-image-evk-ax3005-qemu.wic,format=raw
2. Run QEMU test suite
make check
Ok: 331
Fail: 0
Skipped: 17
make check-functional
Ok: 28
Fail: 0
Skipped: 7
Changes in v4:
1. Add patch ("hw/char/cadence_uart: Reserve MMIO with dynamic size") which
allow other models to revise the MMIO size of Cadence UART
2. Change the MMIO size of Cadence UART to 512 KiB in Ax3000/Ax3005 SoC to
resolve the overlapping region issue
3. Add memory guard in Ax3000/Ax3005 EVK to check the memory size specified by
-m option and set the default_ram_size to the RAM size supported by Axiado
SoC
Changes in v3:
1. Remove patch "hw/arm/ax3000-soc: Add missing class_size to TypeInfo"
because it was fixed by commit 4f50d637e2
("hw/arm/ax3000-soc: fix heap overflow from missing class_size")
Changes in v2:
1. Add patch "hw/arm/ax3000-soc: Add missing class_size to TypeInfo"
to fix incorrect class size
2. Add missing class_size "Ax3005SoCClass" to ax3005_soc_types
Kuan-Jui Chiu (8):
hw/sd/axiado_sdhci: Add header guard
hw/arm: Rename ax3000-boards as axiado-boards
hw/arm/ax3000: Specify SoC name in header and variable
hw/char/cadence_uart: Reserve MMIO with dynamic size
hw/arm/ax3000-soc: Reserve MMIO of UART with 512 KiB
hw/arm/ax3000-boards: Add memory guard
hw/arm: Add Axiado SoC AX3005
hw/arm: Add Axiado Ax3005 EVB
MAINTAINERS | 2 +
hw/arm/ax3000-boards.c | 13 +-
hw/arm/ax3000-evk.c | 4 +-
hw/arm/ax3000-soc.c | 6 +-
hw/arm/ax3005-evk.c | 64 +++++
hw/arm/ax3005-soc.c | 227 ++++++++++++++++++
hw/arm/meson.build | 6 +-
hw/char/cadence_uart.c | 8 +-
include/hw/arm/ax3000-soc.h | 2 +
include/hw/arm/ax3005-soc.h | 103 ++++++++
.../arm/{ax3000-boards.h => axiado-boards.h} | 10 +
include/hw/char/cadence_uart.h | 3 +
include/hw/sd/axiado_sdhci.h | 5 +
13 files changed, 443 insertions(+), 10 deletions(-)
create mode 100644 hw/arm/ax3005-evk.c
create mode 100644 hw/arm/ax3005-soc.c
create mode 100644 include/hw/arm/ax3005-soc.h
rename include/hw/arm/{ax3000-boards.h => axiado-boards.h} (69%)
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2.34.1