Hi Konstantin,
On 8/25/2026 11:22 AM, Konstantin Semichastnov wrote:
> Hi,
>
> This series continues to implement RISC-V tracing subsystem.
> This work implements RISC-V N-Trace (Nexus-based Trace) [1].
>
> N-Trace is a different format for tracing (compared to E-Trace [2]),
> and it is based on same underlying interface: RISC-V Trace Control
> Interface Specification [3].
>
> This is the first patchset of several upcoming patchset series,
> that will ultimately provide full support for N-Trace HTM tracing.
>
> A design decision was chosen to make the most of the existing
> infrastructure of the trace subsystem.
>
> Linux kernel driver support is available here:
>
> https://lore.kernel.org/linux-riscv/20251002060732.100213-1-apatel@ventanamicro.com/
>
> Patches based on Daniel's Efficient Trace patchset [4],
> which provides support for Trace Control Interface and E-Trace messages
> implementation.
I *really* need to re-send that series. I'll do that as soon as I clear up pending
work to avoid holding this series back when it's time to merge it.
Since you're using that series as a base I'll keep you in the loop if I make some
drastic changes in it. I don't think I will - what comes to mind is some TCG side
changes to take advantage of the extra tb_flags we have now.
I remember from those reviews that we were doing changes in that e-trace message code.
I'll keep that code intact, and in case you decide we need changes we can do it as
a follow-up when stuff is already accepted.
Also, please update my email in the CC in the next versions of this work. That email
is still around but not sure for how long ...
Thanks,
Daniel
>
> [1] https://docs.riscv.org/reference/nexus-trace/_attachments/RISC-V-N-Trace.pdf
> [2] https://docs.riscv.org/reference/e-trace/_attachments/riscv-trace-spec.pdf
> [3] https://docs.riscv.org/reference/trace-control-interface/_attachments/RISC-V-Trace-Control-Interface.pdf
> [4] https://lore.kernel.org/qemu-riscv/20251111114656.2285048-1-dbarboza@ventanamicro.com
>
> Based-on: <20251111114656.2285048-1-dbarboza@ventanamicro.com>
>
> Signed-off-by: Konstantin Semichastnov <antikostya2@gmail.com>
> ---
> Konstantin Semichastnov (13):
> hw/riscv/trace-encoder: add ntrace enable flag
> hw/riscv/trace-encoder.c: add trace ntrace/etrace selection logic
> hw/riscv: add n-trace encoder with ProgTraceSync message
> hw/riscv/trace-encoder.c: align ntrace messages with ones
> hw/riscv/trace_encoder, target/riscv: add trace pc history logic
> hw/riscv: add n-trace IndirectBranchHist rv-trace-message
> hw/riscv/trace-encoder: add interrupt support to N-Trace encoder
> hw/riscv: add n-trace ResourceFull rv-trace-message
> hw/riscv: add n-trace ProgTraceCorrelation rv-trace-message
> test/qtest/riscv-trace-test: add test-ntrace-simple qtest
> hw/riscv/trace-encoder.c: add remaining fields to trace-encoder
> hw/riscv/trace-encoder.c: remaining fields to ram-sink as RO values
> hw/riscv/trace-encoder: refactor register accesses
>
> disas/riscv.c | 2 +-
> disas/riscv.h | 2 +
> hw/riscv/rv-trace-messages.c | 265 ++++++++++++++++++++
> hw/riscv/rv-trace-messages.h | 10 +
> hw/riscv/trace-encoder.c | 332 +++++++++++++++++++++----
> hw/riscv/trace-encoder.h | 49 +++-
> hw/riscv/trace-ram-sink.c | 22 +-
> hw/riscv/trace-ram-sink.h | 1 +
> target/riscv/cpu_helper.c | 21 +-
> target/riscv/helper.h | 4 +-
> target/riscv/insn_trans/trans_privileged.c.inc | 10 +-
> target/riscv/insn_trans/trans_rvi.c.inc | 15 +-
> target/riscv/trace_helper.c | 23 +-
> target/riscv/translate.c | 19 +-
> tests/qtest/riscv-trace-test.c | 59 ++++-
> 15 files changed, 734 insertions(+), 100 deletions(-)
> ---
> base-commit: 6cedd046f606f155e054375c369bd606313e5f6c
> change-id: 20260825-upstream-ntrace_core-49bff943062d
>
> Best regards,
> --
> Konstantin Semichastnov <antikostya2@gmail.com>
>
>