target/riscv: Handle [ms]status updates for rv128

[PATCH 0/2] target/riscv: Handle [ms]status updates for rv128

frederic.petrot@univ-grenoble-alpes.fr posted 2 patches 1 month, 1 week ago

Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260819105655.33391-1-frederic.petrot@univ-grenoble-alpes.fr

Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Chao Liu <chao.liu@processmission.com>

target/riscv/tcg/csr.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

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[PATCH 0/2] target/riscv: Handle [ms]status updates for rv128

Posted by frederic.petrot@univ-grenoble-alpes.fr 1 month, 1 week ago

From: Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr>

Correct sstatus update and allow support for rv128 in mstatus,
provided the cpu is an rv128.

Changes compared to v1:
- add cover letter
- add the Reviewed-by tags

Frédéric Pétrot (2):
  target/riscv: Fix sstatus update in rv128
  target/riscv: Allow UXL to be 3 in mstatus on rv128

 target/riscv/tcg/csr.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

-- 
2.43.0

Re: [PATCH 0/2] target/riscv: Handle [ms]status updates for rv128

Posted by Alistair Francis 1 month, 1 week ago

On Wed, 2026-08-19 at 12:56 +0200,
frederic.petrot@univ-grenoble-alpes.fr wrote:
> From: Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr>
> 
> Correct sstatus update and allow support for rv128 in mstatus,
> provided the cpu is an rv128.
> 
> Changes compared to v1:
> - add cover letter
> - add the Reviewed-by tags
> 
> Frédéric Pétrot (2):
>   target/riscv: Fix sstatus update in rv128
>   target/riscv: Allow UXL to be 3 in mstatus on rv128

Thanks!

Applied to riscv-to-apply.next

Alistair

> 
>  target/riscv/tcg/csr.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)

Re: [PATCH 0/2] target/riscv: Handle [ms]status updates for rv128

Posted by Philippe Mathieu-Daudé 1 month, 1 week ago

Hi Frédéric,

On 19/8/26 12:56, frederic.petrot@univ-grenoble-alpes.fr wrote:
> From: Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr>
> 
> Correct sstatus update and allow support for rv128 in mstatus,
> provided the cpu is an rv128.
> 
> Changes compared to v1:
> - add cover letter
> - add the Reviewed-by tags
> 
> Frédéric Pétrot (2):
>    target/riscv: Fix sstatus update in rv128
>    target/riscv: Allow UXL to be 3 in mstatus on rv128

How can we test this series?

Re: [PATCH 0/2] target/riscv: Handle [ms]status updates for rv128

Posted by Frédéric Pétrot 1 month ago

Hi Phil,

   I'll send a asap patch with the test cases.
   Frédéric

On 8/19/26 13:17, Philippe Mathieu-Daudé wrote:
> Hi Frédéric,
> 
> On 19/8/26 12:56, frederic.petrot@univ-grenoble-alpes.fr wrote:
>> From: Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr>
>>
>> Correct sstatus update and allow support for rv128 in mstatus,
>> provided the cpu is an rv128.
>>
>> Changes compared to v1:
>> - add cover letter
>> - add the Reviewed-by tags
>>
>> Frédéric Pétrot (2):
>>    target/riscv: Fix sstatus update in rv128
>>    target/riscv: Allow UXL to be 3 in mstatus on rv128
> 
> How can we test this series?
> 
> 
> 
> 
> 

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