[PATCH v3 0/9] arm: add Cortex-M85, SSE-310, and mps3-an555

Simon Xu posted 9 patches 3 weeks, 5 days ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260818002629.172827-1-simonxhy0404@gmail.com
Maintainers: Peter Maydell <peter.maydell@linaro.org>, Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
docs/system/arm/mps2.rst        |   6 +-
hw/arm/armsse.c                 | 208 +++++++++++++++++++++++++++++++-
hw/arm/mps2-tz.c                | 162 ++++++++++++++++++++++++-
hw/misc/iotkit-secctl.c         | 132 ++++++--------------
hw/misc/iotkit-sysctl.c         |  88 ++++++++++++--
hw/misc/iotkit-sysinfo.c        |  22 +++-
hw/misc/mps2-fpgaio.c           |  35 ++++++
include/hw/arm/armsse-version.h |   2 +
include/hw/arm/armsse.h         |   9 +-
include/hw/misc/mps2-fpgaio.h   |   2 +
target/arm/tcg/cpu-v7m.c        |  41 +++++++
11 files changed, 587 insertions(+), 120 deletions(-)
[PATCH v3 0/9] arm: add Cortex-M85, SSE-310, and mps3-an555
Posted by Simon Xu 3 weeks, 5 days ago
This patch series aims to add the Arm Cortex-M85 CPU, SSE-310 Subsystem,
and mps3-an555 FPGA board.

v2 -> v3
    Removed ppuintstat variable in iotkit-sysctl
    Moved add GPIOALT2 register patch before add mps3-an555 patch
    Add gpioalt2 state field to new vmstate subsection for migration
    Rebased onto master which includes bug fixes to existing models
        in armsse.c and mps2-tz.c
    Patches 1, 3, 8 still needs review

Signed-off-by: Simon Xu <simonxhy0404@gmail.com>

Simon Xu (9):
  target/arm/tcg/cpu-v7m.c: add cortex-m85 model
  hw/arm/armsse: add Arm Corstone SSE-310
  hw/misc/iotkit-sysctl.c: add SSE-310 support
  hw/misc/iotkit-secctl.c: fix AHB secure read
  hw/misc/iotkit-secctl.c: add SSE-310 support
  hw/misc/iotkit-secctl.c: use GNU C case ranges
  hw/misc/iotkit-sysinfo.c: add SSE-310 support
  hw/misc/mps2-fpgaio.c: add GPIOALT2 register
  hw/arm/mps2-tz.c add Arm mps3-an555 board

 docs/system/arm/mps2.rst        |   6 +-
 hw/arm/armsse.c                 | 208 +++++++++++++++++++++++++++++++-
 hw/arm/mps2-tz.c                | 162 ++++++++++++++++++++++++-
 hw/misc/iotkit-secctl.c         | 132 ++++++--------------
 hw/misc/iotkit-sysctl.c         |  88 ++++++++++++--
 hw/misc/iotkit-sysinfo.c        |  22 +++-
 hw/misc/mps2-fpgaio.c           |  35 ++++++
 include/hw/arm/armsse-version.h |   2 +
 include/hw/arm/armsse.h         |   9 +-
 include/hw/misc/mps2-fpgaio.h   |   2 +
 target/arm/tcg/cpu-v7m.c        |  41 +++++++
 11 files changed, 587 insertions(+), 120 deletions(-)

-- 
2.53.0
Re: [PATCH v3 0/9] arm: add Cortex-M85, SSE-310, and mps3-an555
Posted by Peter Maydell 2 weeks, 2 days ago
On Tue, 18 Aug 2026 at 01:26, Simon Xu <simonxhy0404@gmail.com> wrote:
>
> This patch series aims to add the Arm Cortex-M85 CPU, SSE-310 Subsystem,
> and mps3-an555 FPGA board.
>
> v2 -> v3
>     Removed ppuintstat variable in iotkit-sysctl
>     Moved add GPIOALT2 register patch before add mps3-an555 patch
>     Add gpioalt2 state field to new vmstate subsection for migration
>     Rebased onto master which includes bug fixes to existing models
>         in armsse.c and mps2-tz.c
>     Patches 1, 3, 8 still needs review
>
> Signed-off-by: Simon Xu <simonxhy0404@gmail.com>

As I discovered today that the Cortex-M85 has PACBTI as a
configurable feature in hardware, I'm happier about taking
this series before we have proper PACBTI emulation. We've also
decided in Linaro that we will add the PACBTI emulation, so
hopefully the gap before it appears will not be too large.

So I'm going to take this patchseries into target-arm.next.
I made a few minor tweaks (improved comment in patch 1,
fixing a few checkpatch.pl nits, documented missing PACBTI
in the mps2 board docs page).

Thanks for your work on this!

-- PMM
Re: [PATCH v3 0/9] arm: add Cortex-M85, SSE-310, and mps3-an555
Posted by Simon Xu 2 weeks, 2 days ago
Sounds good. Thank you Peter for your help with my first
experience with open source software! I appreciate your
feedback and hope to stay around in the future.

Best regards,
Simon Xu