[v1] Add ASPEED ACRY RSA model for the AST2600

[PATCH v1 0/5] Add ASPEED ACRY RSA model for the AST2600

Posted by Jamin Lin 1 week, 6 days ago

This series adds a model of the ASPEED ACRY engine found on the AST2600
SoC, wires it into the SoC, and adds a qtest.

The ACRY engine performs RSA modular exponentiation (c = m^e mod n). It
DMAs the operands (data, exponent, and modulus) from guest DRAM and writes
the result to a dedicated 64 KiB SRAM region.

Guest firmware uses the engine for RSA signature verification during boot.
Without a model, the guest starts the engine and waits indefinitely for a
completion interrupt, causing the boot to hang.

The model uses QEMU's generic akcipher API to perform raw (unpadded) RSA.
Raw RSA is currently supported only by the libgcrypt backend. When it is
unavailable, the engine still completes and raises its interrupt, but
returns an all-zero result. This allows the guest's signature verification
to fail cleanly instead of hanging. The qtest is skipped when the selected
crypto backend does not support raw RSA.

Although the hardware documentation describes both RSA and ECDSA support,
ECDSA is known to be broken on this hardware and is therefore not modeled.

v1:
 1. Add ASPEED ACRY RSA model for the AST2600
 2. Add qtest for AST2600 ASPEED ACRY RSA model

Jamin Lin (5):
  hw/misc/aspeed_acry: Add ASPEED ACRY model
  hw/arm/aspeed_ast2600: Introduce the ACRY SRAM
  hw/arm/aspeed_soc: Add the ACRY model to AspeedSoCState
  hw/arm/aspeed_ast2600: Wire up the ACRY model
  tests/qtest/aspeed-acry-test: Add RSA ModExp tests

 include/hw/arm/aspeed_soc.h    |   3 +
 include/hw/misc/aspeed_acry.h  |  50 ++++
 hw/arm/aspeed_ast2600.c        |  33 +++
 hw/misc/aspeed_acry.c          | 447 +++++++++++++++++++++++++++++++++
 tests/qtest/aspeed-acry-test.c | 408 ++++++++++++++++++++++++++++++
 hw/misc/meson.build            |   1 +
 hw/misc/trace-events           |   6 +
 tests/qtest/meson.build        |   5 +-
 8 files changed, 952 insertions(+), 1 deletion(-)
 create mode 100644 include/hw/misc/aspeed_acry.h
 create mode 100644 hw/misc/aspeed_acry.c
 create mode 100644 tests/qtest/aspeed-acry-test.c

-- 
2.43.0

Re: [PATCH v1 0/5] Add ASPEED ACRY RSA model for the AST2600

Posted by Cédric Le Goater 1 week ago

On 8/13/26 08:24, Jamin Lin wrote:
> This series adds a model of the ASPEED ACRY engine found on the AST2600
> SoC, wires it into the SoC, and adds a qtest.
> 
> The ACRY engine performs RSA modular exponentiation (c = m^e mod n). It
> DMAs the operands (data, exponent, and modulus) from guest DRAM and writes
> the result to a dedicated 64 KiB SRAM region.
> 
> Guest firmware uses the engine for RSA signature verification during boot.
> Without a model, the guest starts the engine and waits indefinitely for a
> completion interrupt, causing the boot to hang.
> 
> The model uses QEMU's generic akcipher API to perform raw (unpadded) RSA.
> Raw RSA is currently supported only by the libgcrypt backend. When it is
> unavailable, the engine still completes and raises its interrupt, but
> returns an all-zero result. This allows the guest's signature verification
> to fail cleanly instead of hanging. The qtest is skipped when the selected
> crypto backend does not support raw RSA.

One can still use -Dgcrypt=enabled when gnutls is installed.

C.

> 
> Although the hardware documentation describes both RSA and ECDSA support,
> ECDSA is known to be broken on this hardware and is therefore not modeled.
> 
> v1:
>   1. Add ASPEED ACRY RSA model for the AST2600
>   2. Add qtest for AST2600 ASPEED ACRY RSA model
> 
> Jamin Lin (5):
>    hw/misc/aspeed_acry: Add ASPEED ACRY model
>    hw/arm/aspeed_ast2600: Introduce the ACRY SRAM
>    hw/arm/aspeed_soc: Add the ACRY model to AspeedSoCState
>    hw/arm/aspeed_ast2600: Wire up the ACRY model
>    tests/qtest/aspeed-acry-test: Add RSA ModExp tests
> 
>   include/hw/arm/aspeed_soc.h    |   3 +
>   include/hw/misc/aspeed_acry.h  |  50 ++++
>   hw/arm/aspeed_ast2600.c        |  33 +++
>   hw/misc/aspeed_acry.c          | 447 +++++++++++++++++++++++++++++++++
>   tests/qtest/aspeed-acry-test.c | 408 ++++++++++++++++++++++++++++++
>   hw/misc/meson.build            |   1 +
>   hw/misc/trace-events           |   6 +
>   tests/qtest/meson.build        |   5 +-
>   8 files changed, 952 insertions(+), 1 deletion(-)
>   create mode 100644 include/hw/misc/aspeed_acry.h
>   create mode 100644 hw/misc/aspeed_acry.c
>   create mode 100644 tests/qtest/aspeed-acry-test.c
>

RE: [PATCH v1 0/5] Add ASPEED ACRY RSA model for the AST2600

Posted by Jamin Lin 6 days, 14 hours ago

> list:ASPEED BMCs <qemu-arm@nongnu.org>; open list:All patches CC here
> <qemu-devel@nongnu.org>
> Cc: Troy Lee <troy_lee@aspeedtech.com>
> Subject: Re: [PATCH v1 0/5] Add ASPEED ACRY RSA model for the AST2600
> 
> On 8/13/26 08:24, Jamin Lin wrote:
> > This series adds a model of the ASPEED ACRY engine found on the
> > AST2600 SoC, wires it into the SoC, and adds a qtest.
> >
> > The ACRY engine performs RSA modular exponentiation (c = m^e mod n).
> > It DMAs the operands (data, exponent, and modulus) from guest DRAM and
> > writes the result to a dedicated 64 KiB SRAM region.
> >
> > Guest firmware uses the engine for RSA signature verification during boot.
> > Without a model, the guest starts the engine and waits indefinitely
> > for a completion interrupt, causing the boot to hang.
> >
> > The model uses QEMU's generic akcipher API to perform raw (unpadded)
> RSA.
> > Raw RSA is currently supported only by the libgcrypt backend. When it
> > is unavailable, the engine still completes and raises its interrupt,
> > but returns an all-zero result. This allows the guest's signature
> > verification to fail cleanly instead of hanging. The qtest is skipped
> > when the selected crypto backend does not support raw RSA.
> 
> One can still use -Dgcrypt=enabled when gnutls is installed.
> 

Will update

Thanks,
Jamin
> C.
> 
> >
> > Although the hardware documentation describes both RSA and ECDSA
> > support, ECDSA is known to be broken on this hardware and is therefore not
> modeled.
> >
> > v1:
> >   1. Add ASPEED ACRY RSA model for the AST2600
> >   2. Add qtest for AST2600 ASPEED ACRY RSA model
> >
> > Jamin Lin (5):
> >    hw/misc/aspeed_acry: Add ASPEED ACRY model
> >    hw/arm/aspeed_ast2600: Introduce the ACRY SRAM
> >    hw/arm/aspeed_soc: Add the ACRY model to AspeedSoCState
> >    hw/arm/aspeed_ast2600: Wire up the ACRY model
> >    tests/qtest/aspeed-acry-test: Add RSA ModExp tests
> >
> >   include/hw/arm/aspeed_soc.h    |   3 +
> >   include/hw/misc/aspeed_acry.h  |  50 ++++
> >   hw/arm/aspeed_ast2600.c        |  33 +++
> >   hw/misc/aspeed_acry.c          | 447
> +++++++++++++++++++++++++++++++++
> >   tests/qtest/aspeed-acry-test.c | 408 ++++++++++++++++++++++++++++++
> >   hw/misc/meson.build            |   1 +
> >   hw/misc/trace-events           |   6 +
> >   tests/qtest/meson.build        |   5 +-
> >   8 files changed, 952 insertions(+), 1 deletion(-)
> >   create mode 100644 include/hw/misc/aspeed_acry.h
> >   create mode 100644 hw/misc/aspeed_acry.c
> >   create mode 100644 tests/qtest/aspeed-acry-test.c
> >