[v2] tcg: Add revbit opcodes

[PATCH v2 00/16] tcg: Add revbit opcodes

Richard Henderson posted 16 patches 1 month, 2 weeks ago

Diff against v1
Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260811045605.1246543-1-richard.henderson@linaro.org

Maintainers: Richard Henderson <richard.henderson@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>, Peter Maydell <peter.maydell@linaro.org>, Song Gao <17746591750@163.com>, Bibo Mao <maobibo@loongson.cn>, Xianglai Li <lixianglai@loongson.cn>, "Philippe Mathieu-Daudé" <philmd@mailo.com>, Aurelien Jarno <aurelien@aurel32.net>, Jiaxun Yang <jiaxun.yang@flygoat.com>, Aleksandar Rikalo <arikalo@gmail.com>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Chao Liu <chao.liu@processmission.com>, WANG Xuerui <git@xen0n.name>, Stefan Weil <sw@weilnetz.de>

host/include/riscv64/host/cpuinfo.h           |   1 +
include/tcg/tcg-op-common.h                   |   5 +
include/tcg/tcg-op.h                          |   7 +
include/tcg/tcg-opc.h                         |   3 +
target/arm/tcg/helper-a64-defs.h              |   1 -
target/arm/tcg/helper-defs.h                  |   1 -
target/loongarch/tcg/helper.h                 |   4 -
target/mips/helper.h                          |   7 -
target/riscv/helper.h                         |   1 -
target/arm/tcg/helper-a64.c                   |   5 -
target/arm/tcg/op_helper.c                    |   5 -
target/arm/tcg/translate-a64.c                |   4 +-
target/arm/tcg/translate.c                    |   2 +-
target/loongarch/tcg/op_helper.c              |  21 -
target/mips/tcg/octeon_crypto.c               |  35 -
target/mips/tcg/octeon_translate.c            |  49 +-
target/riscv/tcg/bitmanip_helper.c            |  15 -
tcg/optimize.c                                |  77 +-
tcg/tcg-op.c                                  | 186 ++--
tcg/tcg.c                                     |   9 +-
tests/tcg/loongarch64/test_bit.c              |  77 +-
util/cpuinfo-riscv.c                          |  17 +-
docs/devel/tcg-ops.rst                        |  16 +
.../loongarch/tcg/insn_trans/trans_bit.c.inc  |  13 +-
target/riscv/tcg/insn_trans/trans_rvb.c.inc   |   2 +-
tcg/aarch64/tcg-target.c.inc                  |  28 +
tcg/loongarch64/tcg-insn-defs.c.inc           | 960 +++++++++---------
tcg/loongarch64/tcg-target.c.inc              |  40 +
tcg/ppc64/tcg-target.c.inc                    |  12 +
tcg/riscv64/tcg-target.c.inc                  |  27 +
tcg/s390x/tcg-target.c.inc                    |  12 +
tcg/sparc64/tcg-target.c.inc                  |  12 +
tcg/tci/tcg-target.c.inc                      |  12 +
tcg/x86_64/tcg-target.c.inc                   |  12 +
34 files changed, 959 insertions(+), 719 deletions(-)

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[PATCH v2 00/16] tcg: Add revbit opcodes

Posted by Richard Henderson 1 month, 2 weeks ago

Changes for v2:
  - Add revbit8 interfaces and opcode.
  - Adjust loongarch64 target and host to match.
  - Add riscv64 target and host support for revbit8.


r~


Richard Henderson (16):
  tcg: Fix opcode dump for bswap
  tcg: Add tcg_gen_revbit{8,32,64}
  tcg: Simplify bswap/hswap expansion using bitswap
  target/arm: Use generic tcg_gen_revbit*
  target/loongarch: Use generic tcg_gen_revbit*
  target/mips: Expand octeon reflections inline
  target/riscv: Use generic tcg_gen_revbit8
  tcg: Add revbit{8,32,64} opcodes
  tcg/optimize: Handle revbit{8,32,64}
  tcg/aarch64: Implement revbit{32,64}
  tcg/loongarch64: Import REVBIT insns
  tcg/loongarch64: Implement revbit{8,32,64}
  util/cpuinfo-riscv: Detect Zbkb
  tcg/riscv64: Implement revbit8
  tests/tcg/loongarch64: Tidy test_bit.c
  tests/tcg/loongarch64: Add bitrev smoke tests

 host/include/riscv64/host/cpuinfo.h           |   1 +
 include/tcg/tcg-op-common.h                   |   5 +
 include/tcg/tcg-op.h                          |   7 +
 include/tcg/tcg-opc.h                         |   3 +
 target/arm/tcg/helper-a64-defs.h              |   1 -
 target/arm/tcg/helper-defs.h                  |   1 -
 target/loongarch/tcg/helper.h                 |   4 -
 target/mips/helper.h                          |   7 -
 target/riscv/helper.h                         |   1 -
 target/arm/tcg/helper-a64.c                   |   5 -
 target/arm/tcg/op_helper.c                    |   5 -
 target/arm/tcg/translate-a64.c                |   4 +-
 target/arm/tcg/translate.c                    |   2 +-
 target/loongarch/tcg/op_helper.c              |  21 -
 target/mips/tcg/octeon_crypto.c               |  35 -
 target/mips/tcg/octeon_translate.c            |  49 +-
 target/riscv/tcg/bitmanip_helper.c            |  15 -
 tcg/optimize.c                                |  77 +-
 tcg/tcg-op.c                                  | 186 ++--
 tcg/tcg.c                                     |   9 +-
 tests/tcg/loongarch64/test_bit.c              |  77 +-
 util/cpuinfo-riscv.c                          |  17 +-
 docs/devel/tcg-ops.rst                        |  16 +
 .../loongarch/tcg/insn_trans/trans_bit.c.inc  |  13 +-
 target/riscv/tcg/insn_trans/trans_rvb.c.inc   |   2 +-
 tcg/aarch64/tcg-target.c.inc                  |  28 +
 tcg/loongarch64/tcg-insn-defs.c.inc           | 960 +++++++++---------
 tcg/loongarch64/tcg-target.c.inc              |  40 +
 tcg/ppc64/tcg-target.c.inc                    |  12 +
 tcg/riscv64/tcg-target.c.inc                  |  27 +
 tcg/s390x/tcg-target.c.inc                    |  12 +
 tcg/sparc64/tcg-target.c.inc                  |  12 +
 tcg/tci/tcg-target.c.inc                      |  12 +
 tcg/x86_64/tcg-target.c.inc                   |  12 +
 34 files changed, 959 insertions(+), 719 deletions(-)

-- 
2.43.0