[PATCH 0/9] disas: Updates for capstone v6

Richard Henderson posted 9 patches 1 month, 2 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260809013343.664966-1-richard.henderson@linaro.org
Maintainers: Song Gao <17746591750@163.com>, Bibo Mao <maobibo@loongson.cn>, Xianglai Li <lixianglai@loongson.cn>, Laurent Vivier <laurent@vivier.eu>, "Philippe Mathieu-Daudé" <philmd@mailo.com>, Aurelien Jarno <aurelien@aurel32.net>, Jiaxun Yang <jiaxun.yang@flygoat.com>, Aleksandar Rikalo <arikalo@gmail.com>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Chao Liu <chao.liu@processmission.com>, Cornelia Huck <cohuck@redhat.com>, Eric Farman <farman@linux.ibm.com>, Matthew Rosato <mjrosato@linux.ibm.com>, Richard Henderson <richard.henderson@linaro.org>, Ilya Leoshkevich <iii@linux.ibm.com>, David Hildenbrand <david@kernel.org>, Yoshinori Sato <yoshinori.sato@nifty.com>
include/disas/capstone.h | 115 +++++++++++++++++++++++++++++++++++++--
target/riscv/cpu.h       |   2 +-
disas/capstone.c         |  29 +++++++++-
target/loongarch/cpu.c   |   8 +++
target/m68k/cpu.c        |  65 +++++++++++++++++++++-
target/mips/cpu.c        |  60 ++++++++++++++++++--
target/riscv/cpu.c       |  81 ++++++++++++++++++++++++++-
target/s390x/cpu.c       |   4 +-
target/sh4/cpu.c         |  14 +++++
target/tricore/cpu.c     |  31 +++++++++++
10 files changed, 393 insertions(+), 16 deletions(-)
[PATCH 0/9] disas: Updates for capstone v6
Posted by Richard Henderson 1 month, 2 weeks ago
Capstone v6-alpha10 is coming along nicely, and may be able
to replace some of the other disassemblers that we have.

Some targets (alpha, hppa, xtensa) that v6 purports to support
are still in terrible shape.  At least for alpha and hppa that
is presumably because the LLVM support that these claim to be
derived from is not yet in upstream LLVM.


r~


Richard Henderson (9):
  target/riscv: Improve riscv_has_ext
  disas/capstone: Allow for cap_insn_unit > length
  target/riscv: Enable disassembly via capstone
  target/sh4: Enable disassembly via capstone
  target/tricore: Enable disassembly via capstone
  target/loongarch: Enable disassembly via capstone
  target/s390x: Update capstone disassembly to v6
  target/m68k: Enable disassembly via capstone
  target/mips: Enable disassembly via capstone

 include/disas/capstone.h | 115 +++++++++++++++++++++++++++++++++++++--
 target/riscv/cpu.h       |   2 +-
 disas/capstone.c         |  29 +++++++++-
 target/loongarch/cpu.c   |   8 +++
 target/m68k/cpu.c        |  65 +++++++++++++++++++++-
 target/mips/cpu.c        |  60 ++++++++++++++++++--
 target/riscv/cpu.c       |  81 ++++++++++++++++++++++++++-
 target/s390x/cpu.c       |   4 +-
 target/sh4/cpu.c         |  14 +++++
 target/tricore/cpu.c     |  31 +++++++++++
 10 files changed, 393 insertions(+), 16 deletions(-)

-- 
2.43.0